Giuseppe Tuveri

According to our database1, Giuseppe Tuveri authored at least 18 papers between 2012 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs.
J. Syst. Archit., 2017

On-FPGA Real-Time Processing of Biological Signals From High-Density MEAs: a Design Space Exploration.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

2016
On-the-fly adaptivity for process networks over shared-memory platforms.
Microprocess. Microsystems, 2016

MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation.
Microprocess. Microsystems, 2016

2015
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

2014
A Custom MPSoC Architecture With Integrated Power Management for Real-Time Neural Signal Decoding.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014

Online process transformation for polyhedral process networks in shared-memory MPSoCs.
Proceedings of the 3rd Mediterranean Conference on Embedded Computing, 2014

A Stream Buffer Mechanism for Pervasive Splitting Transformations on Polyhedral Process Networks.
Proceedings of the 2nd International Workshop on Many-core Embedded Systems, 2014

2013
Integrated support for Adaptivity and Fault-tolerance in MPSoCs.
PhD thesis, 2013

ASAM: Automatic architecture synthesis and application mapping.
Microprocess. Microsystems, 2013

A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.
Microprocess. Microsystems, 2013

A Low Overhead Self-adaptation Technique for KPN Applications on NoC-based MPSoCs.
Proceedings of the PECCS 2013, 2013

A runtime adaptive H.264 video-decoding MPSoC platform.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

2012
Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper.
VLSI Design, 2012

Adaptivity Support for MPSoCs Based on Process Migration in Polyhedral Process Networks.
VLSI Design, 2012

System Adaptivity and Fault-Tolerance in NoC-based MPSoCs: The MADNESS Project Approach.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

ASAM: Automatic Architecture Synthesis and Application Mapping.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Exploiting binary translation for fast ASIP design space exploration on FPGAs.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012


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