Minyoung Song

According to our database1, Minyoung Song authored at least 21 papers between 2008 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Rapid Structural Pruning of Neural Networks with Set-based Task-Adaptive Meta-Pruning.
CoRR, 2020

A 0.9pJ/Cycle 8ppm/°C DFLL-Based Wakeup Timer Enabled by a Time-Domain Trimming and An Embedded Temperature Sensing.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

30.8 A 3.5mm×3.8mm Crystal-Less MICS Transceiver Featuring Coverages of ±160ppm Carrier Frequency Offset and 4.8-VSWR Antenna Impedance for Insertable Smart Pills.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

30.6 A Low-Power BLE Transceiver with Support for Phase-Based Ranging, Featuring 5µs PLL Locking Time and 5.3ms Ranging Time, Enabled by Staircase-Chirp PLL with Sticky-Lock Channel-Switching.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018
A 0.8V 0.8mm<sup>2</sup> bluetooth 5/BLE digital-intensive transceiver with a 2.3mW phase-tracking RX utilizing a hybrid loop filter for interference resilience in 40nm CMOS.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
An Energy-Efficient Antenna Impedance Detection Using Electrical Balance for Single-Step On-Chip Tunable Matching in Wearable/Implantable Applications.
IEEE Trans. Biomed. Circuits Syst., 2017

2015
14.8 A 0.009mm<sup>2</sup> 2.06mW 32-to-2000MHz 2<sup>nd</sup>-order ΔΣ analogous bang-bang digital PLL with feed-forward delay-locked and phase-locked operations in 14nm FinFET technology.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

15.5 A 0.6V 1.17ps PVT-tolerant and synthesizable time-to-digital converter using stochastic phase interpolation with 16× spatial redundancy in 14nm FinFET technology.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2013
10-315-MHz Cascaded Hybrid Phase-Locked Loop for Pixel Clock Generation.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Piecewise Linear Modulation Technique for Spread Spectrum Clock Generation.
IEEE Trans. Very Large Scale Integr. Syst., 2013

A 1.62 Gb/s-2.7 Gb/s Referenceless Transceiver for DisplayPort v1.1a With Weighted Phase and Frequency Detection.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A 2.4 GHz 0.1-Fref-Bandwidth All-Digital Phase-Locked Loop With Delay-Cell-Less TDC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012
A 3.5 GHz Spread-Spectrum Clock Generator With a Memoryless Newton-Raphson Modulation Profile.
IEEE J. Solid State Circuits, 2012

Representing "too small to see" as "too small to see" with temporal representation.
Proceedings of the CHI Conference on Human Factors in Computing Systems, 2012

2011
A 0.076mm<sup>2</sup> 3.5GHz spread-spectrum clock generator with memoryless Newton-Raphson modulation profile in 0.13μm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
TAVR: temporal-aural-visual representation to convey imperceptible spatial information.
Proceedings of the 28th International Conference on Human Factors in Computing Systems, 2010

TAVR: temporal-aural-visual representation for representing imperceptible spatial information.
Proceedings of the 28th International Conference on Human Factors in Computing Systems, 2010

2009
A 10MHz to 315MHz cascaded hybrid PLL with piecewise linear calibrated TDC.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

WIIS: multimodal simulation for exploring the world beyond visual sense.
Proceedings of the 27th International Conference on Human Factors in Computing Systems, 2009

2008
Using construct-centered design to align curriculum, instruction, and assessment development in emerging science.
Proceedings of the Cre8ing a learning world: Proceedings of the 8th International Conference for the Learning Sciences, 2008

A 1.5 GHz spread spectrum clock generator with a 5000ppm piecewise linear modulation.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008


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