Song Yao

According to our database1, Song Yao authored at least 28 papers between 2008 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 




Patent Labeling and Cooperation in a Cloud Service Supply Chain.
IEEE Access, 2020

An Improved Prim Algorithm for Connection Scheme of Last Train in Urban Mass Transit Network.
Symmetry, 2019

<i>SeqSQC</i>: A <i>Bioconductor</i> Package for Evaluating the Sample Quality of Next-generation Sequencing Data.
Genom. Proteom. Bioinform., 2019

Organic Food Labeling and Advertising: A Tripartite Game Model between One Supplier and Two Heterogeneous Manufacturers.
Complex., 2019

Towards Real-Time Object Detection on Embedded Systems.
IEEE Trans. Emerg. Top. Comput., 2018

Angel-Eye: A Complete Design Flow for Mapping CNN Onto Embedded FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Real-time object detection towards high power efficiency.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Does Online Word of Mouth Increase Demand? (And How?) Evidence from a Natural Experiment.
Mark. Sci., 2017

Software-Hardware Codesign for Efficient Neural Network Acceleration.
IEEE Micro, 2017

Sequential Search with Refinement: Model and Application with Click-Stream Data.
Manag. Sci., 2017

Approximate Dynamic Programming for Relay Deployment in Multi-robot System.
Proceedings of the Intelligent Robotics and Applications - 10th International Conference, 2017

ESE: Efficient Speech Recognition Engine with Sparse LSTM on FPGA.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA.
CoRR, 2016

Angel-Eye: A Complete Design Flow for Mapping CNN onto Customized Hardware.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Low power Convolutional Neural Networks on a chip.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

From model to FPGA: Software-hardware co-design for efficient neural network acceleration.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

Going Deeper with Embedded FPGA Platform for Convolutional Neural Network.
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

Real-Time Pedestrian Detection and Tracking on Customized Hardware.
Proceedings of the 14th ACM/IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2016

HS3-DPG: Hierarchical Simulation for 3-D P/G Network.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Systematic assessment of imputation performance using the 1000 Genomes reference panels.
Briefings Bioinform., 2015

FASTrust: Feature analysis for third-party IP trust verification.
Proceedings of the 2015 IEEE International Test Conference, 2015

On the Robust Optimal Stopping Problem.
SIAM J. Control. Optim., 2014

Efficient region-aware P/G TSV planning for 3D ICs.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

A Weak Dynamic Programming Principle for Zero-Sum Stochastic Differential Games with Unbounded Controls.
SIAM J. Control. Optim., 2013

Robust Optimal Stopping under Volatility Uncertainty
CoRR, 2013

A Dynamic Model of Sponsored Search Advertising.
Mark. Sci., 2011

Online Auction Demand.
Mark. Sci., 2008