Sudarshan Srinivasan
According to our database1,
Sudarshan Srinivasan
authored at least 46 papers
between 2011 and 2024.
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Bibliography
2024
Leveraging Large Language Models to Extract Information on Substance Use Disorder Severity from Clinical Notes: A Zero-shot Learning Approach.
CoRR, 2024
2023
Question-Answering System Extracts Information on Injection Drug Use from Clinical Progress Notes.
CoRR, 2023
CoRR, 2023
ASTRA-sim2.0: Modeling Hierarchical Networks and Disaggregated Systems for Large-model Training at Scale.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
BioADAPT-MRC: adversarial learning-based domain adaptation improves biomedical machine reading comprehension task.
Bioinform., 2022
Improving Efficiency and Robustness of Transformer-based Information Retrieval Systems.
Proceedings of the SIGIR '22: The 45th International ACM SIGIR Conference on Research and Development in Information Retrieval, Madrid, Spain, July 11, 2022
Themis: a network bandwidth-aware collective scheduling policy for distributed training of DL models.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022
A Highly-Efficient Error Detection Technique for General Matrix Multiplication using Tiled Processing on SIMD Architecture.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
2021
Exploring Multi-dimensional Hierarchical Network Topologies for Efficient Distributed Training of Trillion Parameter DL Models.
CoRR, 2021
The Sensitivity of Word Embeddings-based Author Detection Models to Semantic-preserving Adversarial Perturbations.
CoRR, 2021
Nomen est Omen - The Role of Signatures in Ascribing Email Author Identity with Transformer Neural Networks.
Proceedings of the IEEE Security and Privacy Workshops, 2021
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021
Enabling Compute-Communication Overlap in Distributed Deep Learning Training Platforms.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021
Proceedings of the 2021 IEEE International Conference on Big Data (Big Data), 2021
2020
Efficient Communication Acceleration for Next-Gen Scale-up Deep Learning Training Platforms.
CoRR, 2020
Proceedings of the International Conference for High Performance Computing, 2020
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
ASTRA-SIM: Enabling SW/HW Co-Design Exploration for Distributed DL Training Platforms.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020
SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Proceedings of the Heterogeneous Data Management, Polystores, and Analytics for Healthcare, 2020
2019
Proceedings of the 2019 IEEE International Conference on Cluster Computing, 2019
2016
IEEE Trans. Parallel Distributed Syst., 2016
Dynamic Reconfiguration vs. DVFS: A Comparative Study on Power Efficiency of Processors.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
Improving performance per Watt of non-monotonic Multicore Processors via bottleneck-based online program phase classification.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Online mechanism for reliability and power-efficiency management of a dynamically reconfigurable core.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
2014
Proceedings of the Annual Conference of the Extreme Science and Engineering Discovery Environment, 2014
A cleanup algorithm for implementing storage constraints in scientific workflow executions.
Proceedings of the 9th Workshop on Workflows in Support of Large-Scale Science, 2014
A systematic approach to transforming system requirements into model checking specifications.
Proceedings of the 36th International Conference on Software Engineering, 2014
A runtime support mechanism for fast mode switching of a self-morphing core for power efficiency.
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014
2013
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013
A study on polymorphing superscalar processor dynamically to improve power efficiency.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
Program phase duration prediction and its application to fine-grain power management.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
2012
A Wavelet-Based Spatio-Temporal Heat Dissipation Model for Reordering of Program Phases to Produce Temperature Extremes in a Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012
2011
Maximizing hotspot temperature: Wavelet based modelling of heating and cooling profile of functional workloads.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Stress aware switching activity driven low power design of critical paths in nanoscale CMOS circuits.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011