Takahiro Uchida

According to our database1, Takahiro Uchida authored at least 12 papers between 2007 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
System Integration of an Automatic Citrus unshiu Harvesting Robot and a Method for Their Fruits Recognition.
Proceedings of the IEEE/SICE International Symposium on System Integration, 2026

Musculoskeletal analysis focusing on the gait of small dogs walking on slippery wooden floors.
Proceedings of the IEEE/SICE International Symposium on System Integration, 2026

2025
Analysis of the Musculoskeletal Load Generated when a Small Dog Walks on a Slippery Floor.
Proceedings of the IEEE/SICE International Symposium on System Integration, 2025

2024
Taste Sensor Assessment of Bitterness in Medicines: Overview and Recent Topics.
Sensors, August, 2024

Analysis of the musculoskeletal effects of lower limb slippage when indoor dogs walk on the wooden floor.
Proceedings of the 33rd IEEE International Symposium on Industrial Electronics, 2024

Electro-Optic Sensor with Current Compensating Circuit for Measuring Low Frequency Noise.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2024

2020
Development of Taste Sensor to Detect Non-Charged Bitter Substances.
Sensors, 2020

2019
Compact Calibration-Free Eye-Tracking System for Students with Severe Physical and Intellectual Disabilities.
Proceedings of the 7th International conference on ICT & Accessibility, 2019

2018
Calibration-Free Eye- Tracking System in Education for Students with Severe Physical and Intellectual Disabilities.
Proceedings of the IEEE International Conference on Teaching, 2018

2015
Surface interaction of microbubbles and applications of hydrogen-bubble method for cleaning and separation.
Proceedings of the 2015 International Symposium on Micro-NanoMechatronics and Human Science, 2015

2008
A 65 nm Embedded SRAM With Wafer Level Burn-In Mode, Leak-Bit Redundancy and Cu E-Trim Fuse for Known Good Die.
IEEE J. Solid State Circuits, 2008

2007
A 65nm Embedded SRAM with Wafer-Level Burn-In Mode, Leak-Bit Redundancy and E-Trim Fuse for Known Good Die.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007


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