Tiantian Liu

According to our database1, Tiantian Liu authored at least 35 papers between 2008 and 2018.

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Bibliography

2018
FEPR: fast energy projection for real-time simulation of deformable objects.
ACM Trans. Graph., 2018

Stabilizing Integrators for Real-Time Physics.
ACM Trans. Graph., 2018

Efficient and Qualified Mesh Generation for Gaussian Molecular Surface Using Adaptive Partition and Piecewise Polynomial Approximation.
SIAM J. Scientific Computing, 2018

Rational fractal surface interpolating scheme with variable parameters.
Computer Aided Geometric Design, 2018

Laplacian Damping for Projective Dynamics.
Proceedings of the VRIPHYS 2018 : 14th Workshop on Virtual Reality Interaction and Physical Simulation, 15, 2018

Preclinical Stages of Alzheimer's Disease Classification by a Rs-fMRI Study.
Proceedings of the 11th International Congress on Image and Signal Processing, 2018

2017
Quasi-Newton Methods for Real-Time Simulation of Hyperelastic Materials.
ACM Trans. Graph., 2017

State Asymmetry Driven State Remapping in Phase Change Memory.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

2016
Reconstructing personalized anatomical models for physics-based body animation.
ACM Trans. Graph., 2016

Fast and Robust Inversion-Free Shape Manipulation.
Comput. Graph. Forum, 2016

Parallelization of a series of extreme learning machine algorithms based on spark.
Proceedings of the 15th IEEE/ACIS International Conference on Computer and Information Science, 2016

2015
A Stock Trading Strategy Based on Time-Varying Quantile Theory.
JACIII, 2015

USTB at Social Book Search 2015 Suggestion Task: Metadata Expansion and Reranking.
Proceedings of the Working Notes of CLEF 2015, 2015

A generic retrieval system for biomedical literatures: USTB at BioASQ2015 Question Answering Task.
Proceedings of the Working Notes of CLEF 2015, 2015

2014
Projective dynamics: fusing constraint projections for fast simulation.
ACM Trans. Graph., 2014

2013
Power-Aware Variable Partitioning for DSPs With Hybrid PRAM and DRAM Main Memory.
IEEE Trans. Signal Processing, 2013

Fast simulation of mass-spring systems.
ACM Trans. Graph., 2013

Anatomy transfer.
ACM Trans. Graph., 2013

Joint variable partitioning and bank selection instruction optimization for partitioned memory architectures.
ACM Trans. Embedded Comput. Syst., 2013

Register allocation for embedded systems to simultaneously reduce energy and temperature on registers.
ACM Trans. Embedded Comput. Syst., 2013

2012
Instruction Cache Locking for Embedded Systems using Probability Profile.
Signal Processing Systems, 2012

Instruction cache locking for multi-task real-time embedded systems.
Real-Time Systems, 2012

Register allocation for write activity minimization on non-volatile main memory for embedded systems.
Journal of Systems Architecture - Embedded Systems Design, 2012

Analysis and approximation for bank selection instruction minimization on partitioned memory architecture.
J. Comb. Optim., 2012

2011
Joint task assignment and cache partitioning with cache locking for WCET minimization on MPSoC.
J. Parallel Distrib. Comput., 2011

Register allocation for simultaneous reduction of energy and peak temperature on registers.
Proceedings of the Design, Automation and Test in Europe, 2011

Power-aware variable partitioning for DSPs with hybrid PRAM and DRAM main memory.
Proceedings of the 48th Design Automation Conference, 2011

Register allocation for write activity minimization on non-volatile main memory.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture.
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, 2010

Task Assignment with Cache Partitioning and Locking for WCET Minimization on MPSoC.
Proceedings of the 39th International Conference on Parallel Processing, 2010

Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Instruction Cache Locking for Real-Time Embedded Systems with Multi-tasks.
Proceedings of the 15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2009

Minimizing WCET for Real-Time Embedded Systems via Static Instruction Cache Locking.
Proceedings of the 15th IEEE Real-Time and Embedded Technology and Applications Symposium, 2009

A Novel Process Migration Method for MPI Applications.
Proceedings of the 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing, 2009

2008
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks.
Proceedings of the IEEE International Conference on Acoustics, 2008


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