Vojkan Vidojkovic

According to our database1, Vojkan Vidojkovic authored at least 18 papers between 2002 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
Digitally Modulated CMOS Polar Transmitters for Highly-Efficient mm-Wave Wireless Communication.
IEEE J. Solid State Circuits, 2016

F3: Radio architectures and circuits towards 5G.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
Data Transmission at Millimeter Waves - Exploiting the 60 GHz Band on Silicon
Lecture Notes in Electrical Engineering 346, Springer, ISBN: 978-3-662-46938-5, 2015

ES3: How to achieve 1000× more wireless data capacity? 5G?
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 6x-oversampling 10GS/s 60GHz polar transmitter with 15.3% average PA efficiency in 40nm CMOS.
Proceedings of the ESSCIRC Conference 2015, 2015

2013
Signal processing challenges for emerging digital intensive and digitally assisted transceivers with deeply scaled technology (Invited).
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

A low-power radio chipset in 40nm LP CMOS with beamforming for 60GHz high-data-rate wireless communication.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

CMOS low-power transceivers for 60GHz multi Gbit/s communications.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
A low-power 57-to-66GHz transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2010
A 40 nm LP CMOS PLL for high-speed mm-wave communication.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

2008
Receiver Front-End Circuits for Future Generations of Wireless Communications.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP.
Proceedings of the ESSCIRC 2008, 2008

2005
A low-voltage folded-switching mixer in 0.18-μm CMOS.
IEEE J. Solid State Circuits, 2005

2004
A DECT/Bluetooth multi-standard front-end with adaptive image rejection in 0.18µm CMOS.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Low voltage, low power folded-switching mixer with current-reuse in 0.18µm CMOS.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Fully-integrated DECT/Bluetooth multi-band LNA in 0.18µm CMOS.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
Mixer topology selection for a 1.8 - 2.5 GHz multi-standard front-end in 0.18µm CMOS.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Analysis of an 1.8 - 2.5 GHz multi-standard high image-reject front-end.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002


  Loading...