Steven Thijs

According to our database1, Steven Thijs authored at least 19 papers between 2003 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2012
A low-power 57-to-66GHz transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.
IEEE J. Solid State Circuits, 2011

2010

Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
ESD On-Wafer Characterization: Is TLP Still the Right Measurement Tool?
IEEE Trans. Instrum. Meas., 2009

A plug-and-play wideband RF circuit ESD protection methodology: T-diodes.
Microelectron. Reliab., 2009

A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA.
IEEE J. Solid State Circuits, 2009

50-to-67GHz ESD-protected power amplifiers in digital 45nm LP CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Low-cost feedback-enabled LNAs in 45nm CMOS.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Transient voltage overshoot in TLP testing - Real or artifact?
Microelectron. Reliab., 2007

2006
Implementation of plug-and-play ESD protection in 5.5GHz 90nm RF CMOS LNAs - Concepts, constraints and solutions.
Microelectron. Reliab., 2006

2005
ESD-RF co-design methodology for the state of the art RF-CMOS blocks.
Microelectron. Reliab., 2005

A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS.
IEEE J. Solid State Circuits, 2005

Advanced SCR ESD protection circuits for CMOS/SOI nanotechnologies.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

Low-power low-noise highly ESD robust LNA, and VCO design using above-IC inductors.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

RF ESD protection strategies - the design and performance trade-off challenges.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003
High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices.
Microelectron. Reliab., 2003


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