Bertrand Parvais

Orcid: 0000-0003-0769-7069

According to our database1, Bertrand Parvais authored at least 42 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
A Composite AlGaN/cGaN Back Barrier for mm-Wave GaN-on-Si HEMTs.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

2022
Interpretation and modelling of dynamic-RON kinetics in GaN-on-Si HEMTs for mm-wave applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Temperature Dependent Mismatch and Variability in a Cryo-CMOS Array with 30k Transistors.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

III-V HBTs on 300 mm Si substrates using merged nano-ridges and its application in the study of impact of defects on DC and RF performance.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

Impact of channel thickness scaling on the performance of GaN-on-Si RF HEMTs on highly C-doped GaN buffer.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

A 28nm 6.5-8.1GHz 1.16mW/qubit Cryo-CMOS System-an-Chip for Superconducting Qubit Readout.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021

A BSIM-Based Predictive Hot-Carrier Aging Compact Model.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

On the impact of buffer and GaN-channel thickness on current dispersion for GaN-on-Si RF/mmWave devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

Understanding the memory window in 1T-FeFET memories: a depolarization field perspective.
Proceedings of the IEEE International Memory Workshop, 2021

CMOS compatible GaN-on-Si HEMT technology for RF applications: analysis of substrate losses and non-linearities.
Proceedings of the International Conference on IC Design and Technology, 2021

Impact of III-N buffer layers on RF losses and harmonic distortion of GaN-on-Si Substrates.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

2020
Exploring the DC reliability metrics for scaled GaN-on-Si devices targeted for RF/5G applications.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Reliability and Variability of Advanced CMOS Devices at Cryogenic Temperatures.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Device Scaling roadmap and its implications for Logic and Analog platform.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2020

2019
Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Design of a 28 GHz differential GaAs power amplifier with capacitive neutralization for 5G mmwave applications.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

2018
A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability.
Microelectron. Reliab., 2018

Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling.
Proceedings of the 2018 International Conference on IC Design & Technology, 2018

Scaling CMOS beyond Si FinFET: an analog/RF perspective.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017
Back-gate bias effect on UTBB-FDSOI non-linearity performance.
Proceedings of the 47th European Solid-State Device Research Conference, 2017

2015
A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS.
IEEE J. Solid State Circuits, 2015

Modeling FinFET metal gate stack resistance for 14nm node and beyond.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2014
21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

14.2 A 79GHz phase-modulated 4GHz-BW CW radar TX in 28nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014


2013
A low-power radio chipset in 40nm LP CMOS with beamforming for 60GHz high-data-rate wireless communication.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

CMOS low-power transceivers for 60GHz multi Gbit/s communications.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
A low-power 57-to-66GHz transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2010
Identifying the Bottlenecks to the RF Performance of FinFETs.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

A 40 nm LP CMOS PLL for high-speed mm-wave communication.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009
Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

FinFET RF receiver building blocks operating above 10 GHz.
Proceedings of the 35th European Solid-State Circuits Conference, 2009


2008
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Design of UWB LNA in 45nm CMOS technology: Planar bulk vs. FinFET.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
The Potential of FinFETs for Analog and RF Circuit Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

FinFET technology for analog and RF circuits.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

Analog design challenges and trade-offs using emerging materials and devices.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

An Accurate Scalable Compact Model for the Substrate Resistance of RF MOSFETs.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007


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