Dong-Hyuk Lim
According to our database1,
Dong-Hyuk Lim
authored at least 7 papers
between 2011 and 2023.
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Bibliography
2023
A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links.
IEEE J. Solid State Circuits, 2023
2022
An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2020
6.4 A 56Gb/s 7.7mW/Gb/s PAM-4 Wireline Transceiver in 10nm FinFET Using MM-CDR-Based ADC Timing Skew Control and Low-Power DSP with Approximate Multiplier.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2014
A Reconfigurable 40-to-67 dB SNR, 50-to-6400 Hz Frame-Rate, Column-Parallel Readout IC for Capacitive Touch-Screen Panels.
IEEE J. Solid State Circuits, 2014
2012
A low-noise differential front-end and its controller for capacitive touch screen panels.
Proceedings of the 38th European Solid-State Circuit conference, 2012
2011
A 4.8Gb/s impedance-matched bidirectional multi-drop transceiver for high-capacity memory interface.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011