Xingchao Yuan

According to our database1, Xingchao Yuan authored at least 11 papers between 2002 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2013
A 0.4-mW/Gb/s Near-Ground Receiver Front-End With Replica Transconductance Termination Calibration for a 16-Gb/s Source-Series Terminated Transceiver.
IEEE J. Solid State Circuits, 2013

2012
A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface.
IEEE J. Solid State Circuits, 2012

A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface.
IEEE J. Solid State Circuits, 2012

A 4.1-pJ/b, 16-Gb/s Coded Differential Bidirectional Parallel Electrical Link.
IEEE J. Solid State Circuits, 2012

A 0.4mW/Gb/s 16Gb/s near-ground receiver front-end with replica transconductance termination calibration.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 4.1pJ/b 16Gb/s coded differential bidirectional parallel electrical link.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
On overcoming the limitations of single-ended signaling for graphics memory interfaces.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2008
Simulation and Measurement of On-Chip Supply Noise in Multi-Gigabit I/O Interfaces.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2003
Modeling and Analysis of Power Distribution Networks for Gigabit Applications.
IEEE Trans. Mob. Comput., 2003

Modeling and Analysis of Power Distribution Networks for Gigabit Applications.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

2002
On the Use of Windows for Accurate Analysis of Package Interconnects.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002


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