Yoshihide Komatsu

According to our database, Yoshihide Komatsu authored at least 12 papers between 2004 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Investigation of the Failure Mechanism of InGaAs-pHEMT under High Temperature Operating Life Tests.

Yasunori Tateno, Ken Nakata, Akio Oya, Keita Matsuda, Yoshihide Komatsu, Shinichi Osada, Masafumi Hirata, Shigeyuki Ishiyama, Toshiki Yoda, Atsushi Nitta, Tomio Sato

Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020

A 0.6-V Adaptive Voltage Swing Serial Link Transmitter Using Near Threshold Body Bias Control and Jitter Estimation.

Yoshihide Komatsu, Akinori Shinmyo, Mayuko Fujita, Tsuyoshi Hiraki, Kouichi Fukuda, Noriyuki Miura, Makoto Nagata

IEICE Trans. Electron., 2020

2019

A 0.25-27-Gb/s PAM4/NRZ Transceiver With Adaptive Power CDR and Jitter Analysis.

Yoshihide Komatsu, Akinori Shinmyo, Shuji Kato, Masami Funabashi, Kazuya Hatooka, Mayuko Fujita, Kenji Tanaka, Aoi Yamasaki, Kouichi Fukuda

IEEE J. Solid State Circuits, 2019

2018

A 0.25-27Gb/s Wideband PAM4/NRZ Transceiver with Adaptive Power CDR for 8K System.

Yoshihide Komatsu, Akinori Shinmyo, Masami Funabashi, Shuji Kato, Kazuya Hatooka, Kenji Tanaka, Mayuko Fujita, Kouichi Fukuda

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2011

An Ultra-Wide Range Bi-Directional Transceiver With Adaptive Power Control Using Background Replica VCO Gain Calibration.

Tsuyoshi Ebuchi, Yoshihide Komatsu, Masatomo Miura, Tomoko Chiba, Toru Iwata, Shiro Dosho, Takefumi Yoshikawa

IEEE J. Solid State Circuits, 2011

2009

A 125-1250 MHz Process-Independent Adaptive Bandwidth Spread Spectrum Clock Generator With Digital Controlled Self-Calibration.

Tsuyoshi Ebuchi, Yoshihide Komatsu, Tatsuo Okamoto, Yukio Arima, Yuji Yamada, Kazuaki Sogawa, Kouji Okamoto, Takashi Morie, Takashi Hirata, Shiro Dosho, Takefumi Yoshikawa

IEEE J. Solid State Circuits, 2009

2008

Transceiver Macro with Spread-Spectrum Clocking Capability for AC-Coupled Cable Interfaces.

Takefumi Yoshikawa, Yoshihide Komatsu, Tsuyoshi Ebuchi, Takashi Hirata

IEICE Trans. Electron., 2008

2007

Substrate-Noise and Random-Variability Reduction with Self-Adjusted Forward Body Bias.

Yoshihide Komatsu, Koichiro Ishibashi, Makoto Nagata

IEICE Trans. Electron., 2007

2006

Soft Error Hardened Latch Scheme with Forward Body Bias in a 90-nm Technology and Beyond.

Yoshihide Komatsu, Yukio Arima, Koichiro Ishibashi

IEICE Trans. Electron., 2006

Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond.

Koichiro Ishibashi, Tetsuya Fujimoto, Takahiro Yamashita, Hiroyuki Okada, Yukio Arima, Yasuyuki Hashimoto, Kohji Sakata, Isao Minematsu, Yasuo Itoh, Haruki Toda, Motoi Ichihashi, Yoshihide Komatsu, Masato Hagiwara, Toshiro Tsukada

IEICE Trans. Electron., 2006

2005

Substrate-noise and random-fluctuations reduction with self-adjusted forward body bias.

Yoshihide Komatsu, Koichiro Ishibashi, Masaharu Yamamoto, Toshiro Tsukada, Kenji Shimazaki, Mitsuya Fukazawa, Makoto Nagata

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

A soft-error hardened latch scheme for SoC in a 90 nm technology and beyond.

Yoshihide Komatsu, Yukio Arima, Tetsuya Fujimoto, Takahiro Yamashita, Koichiro Ishibashi

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004