Takefumi Yoshikawa

According to our database1, Takefumi Yoshikawa authored at least 20 papers between 2005 and 2020.

Collaborative distances:



In proceedings 
PhD thesis 


On csauthors.net:


Effect of Complex Permeability on Circuit Parameters of CPW with Magnetic Noise Suppression Sheet.
IEICE Trans. Commun., 2020

A charge recycling stacked I/O in standard CMOS technology for wide TSV data bus.
IEICE Electron. Express, 2020

Yield Enhancement of Face-to-Face Cu-Cu Bonding With Dual-Mode Transceivers in 3DICs.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Session 23 overview: DRAM, MRAM & DRAM interfaces.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2.31-Gb/s/ch Area-Efficient Crosstalk Canceled Hybrid Capacitive Coupling Interconnect for 3-D Integration.
IEEE Trans. Very Large Scale Integr. Syst., 2016

F1: Designing secure systems: Manufacturing, circuits and architectures.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Session 17 overview: Embedded memory and DRAM I/O: Memory subcommittee.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

F2: Memory trends: From big data to wearable devices.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 3-Gb/s/ch Simultaneous Bidirectional Capacitive Coupling Transceiver for 3DICs.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Timing margin enhancement technique for current mode interface.
IEICE Electron. Express, 2014

A jitter suppression technique against data pattern dependency on high-speed interfaces for highly integrated SoCs.
IEICE Electron. Express, 2014

Design of self-biased fully differential receiver and crosstalk cancellation for capacitive coupled vertical interconnects in 3DICs.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Design of Simultaneous Bi-Directional Transceivers Utilizing Capacitive Coupling for 3DICs in Face-to-Face Configuration.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

An Ultra-Wide Range Bi-Directional Transceiver With Adaptive Power Control Using Background Replica VCO Gain Calibration.
IEEE J. Solid State Circuits, 2011

Design of capacitive-coupling-based simultaneously bi-directional transceivers for 3DIC.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

A 125-1250 MHz Process-Independent Adaptive Bandwidth Spread Spectrum Clock Generator With Digital Controlled Self-Calibration.
IEEE J. Solid State Circuits, 2009

An Over-1-Gb/s Transceiver Core for Integration Into Large System-on-Chips for Consumer Electronics.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Current-Mode Transceiver with Nonfeedback Clock Recovery Capability for Mobile Applications.
IEICE Trans. Electron., 2008

Transceiver Macro with Spread-Spectrum Clocking Capability for AC-Coupled Cable Interfaces.
IEICE Trans. Electron., 2008

A Spread Spectrum Clock Generator Using Digital Tracking Scheme.
IEICE Trans. Electron., 2005