Yu Ting Chen

According to our database1, Yu Ting Chen authored at least 6 papers between 2014 and 2019.

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Bibliography

2019
High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for FPGAs with Registered Routing.
Proceedings of the International Conference on Field-Programmable Technology, 2019

EASY: Efficient Arbiter SYnthesis from Multi-threaded Code.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2017
Automated generation of banked memory architectures in the high-level synthesis of multi-threaded software.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
A Survey and Evaluation of FPGA High-Level Synthesis Tools.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

LegUp High-Level Synthesis.
Proceedings of the FPGAs for Software Programmers, 2016

2014
Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis.
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014


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