Hsuan Hsiao

According to our database, Hsuan Hsiao authored at least 13 papers between 2016 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2022

Homomorphically Encrypted Computation using Stochastic Encodings.

Hsuan Hsiao, Vincent T. Lee, Brandon Reagen, Armin Alaghi

CoRR, 2022

Streaming Accuracy: Characterizing Early Termination in Stochastic Computing.

Hsuan Hsiao, Joshua San Miguel, Jason Helge Anderson

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

uGEMM: Unary Computing for GEMM Applications.

Di Wu, Jingjie Li, Ruokai Yin, Hsuan Hsiao, Younghyun Kim, Joshua San Miguel

IEEE Micro, 2021

Zero Correlation Error: A Metric for Finite-Length Bitstream Independence in Stochastic Computing.

Hsuan Hsiao, Joshua San Miguel, Yuko Hara-Azumi, Jason Helge Anderson

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Double-Pumping the Interconnect for Area Reduction in Coarse-Grained Reconfigurable Arrays.

Xinyuan Wang, Tianyi Yu, Hsuan Hsiao, Jason Helge Anderson

Proceedings of the 32nd IEEE International Conference on Application-specific Systems, 2021

CGRA-ME: An Open-Source Framework for CGRA Architecture and CAD Research : (Invited Paper).

Jason Helge Anderson, Rami Beidas, Vimal Chacko, Hsuan Hsiao, Xiaoyi Ling, Omar Ragheb, Xinyuan Wang, Tianyi Yu

Proceedings of the 32nd IEEE International Conference on Application-specific Systems, 2021

2020

UGEMM: Unary Computing Architecture for GEMM Applications.

Di Wu, Jingjie Li, Ruokai Yin, Hsuan Hsiao, Younghyun Kim, Joshua San Miguel

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019

Thread Weaving: Static Resource Scheduling for Multithreaded High-Level Synthesis.

Hsuan Hsiao, Jason Helge Anderson

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

The EH Model: Early Design Space Exploration of Intermittent Processor Architectures.

Joshua San Miguel, Karthik Ganesan, Mario Badr, Chunqiu Xia, Rose Li, Hsuan Hsiao, Natalie D. Enright Jerger

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Sensei: An area-reduction advisor for FPGA high-level synthesis.

Hsuan Hsiao, Jason Helge Anderson

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

High-level synthesis of software-customizable floating-point cores.

Samridhi Bansal, Hsuan Hsiao, Tomasz S. Czajkowski, Jason Helge Anderson

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2016

A Survey and Evaluation of FPGA High-Level Synthesis Tools.

Razvan Nane, Vlad Mihai Sima, Christian Pilato, Jongsok Choi, Blair Fort, Andrew Canis, Yu Ting Chen, Hsuan Hsiao, Stephen Dean Brown, Fabrizio Ferrandi, Jason Helge Anderson, Koen Bertels

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

LegUp High-Level Synthesis.

Andrew Canis, Jongsok Choi, Blair Fort, Bain Syrowik, Ruolong Lian, Yu Ting Chen, Hsuan Hsiao, Jeffrey B. Goeders, Stephen Dean Brown, Jason Helge Anderson

Proceedings of the FPGAs for Software Programmers, 2016