Yuncheng Lu
Orcid: 0000-0003-0465-942X
According to our database1,
Yuncheng Lu
authored at least 13 papers
between 2018 and 2023.
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Bibliography
2023
Analysis on the inherent noise tolerance of feedforward network and one noise-resilient structure.
Neural Networks, August, 2023
A Digital Bit-Reconfigurable Versatile Compute-In-Memory Macro for Machine Learning Acceleration.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2023
A 184-μW Error-Tolerant Real-Time Hand Gesture Recognition System With Hybrid Tiny Classifiers Utilizing Edge CNN.
IEEE J. Solid State Circuits, February, 2023
A 400MHz 249.1TOPS/W 64Kb Fully-Reconfigurable SRAM-Based Digital Compute-in-Memory Macro for Accelerating CNNs.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor with Computing-In-Memory and Dead Neuron Pruning.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
Proceedings of the 14th International Conference on Wireless Communications and Signal Processing, 2022
Proceedings of the 19th International SoC Design Conference, 2022
A 181µW Real-Time 3-D Hand Gesture Recognition System based on Bi-directional Convolution and Computing-Efficient Feature Clustering.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
9.7 A 184 µ W Real-Time Hand-Gesture Recognition System with Hybrid Tiny Classifiers for Smart Wearable Devices.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
A Multi-Functional 4T2R ReRAM Macro Enabling 2-Dimensional Access and Computing In-Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2018