Akshay Krishna Ramanathan

According to our database1, Akshay Krishna Ramanathan authored at least 10 papers between 2018 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


FARM: A Flexible Accelerator for Recurrent and Memory Augmented Neural Networks.
J. Signal Process. Syst., 2020

Look-Up Table based Energy Efficient Processing in Cache Support for Neural Network Acceleration.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Integrated CAM-RAM Functionality using Ferroelectric FETs.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

IMC-Sort: In-Memory Parallel Sorting Architecture using Hybrid Memory Cube.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Recent Advances in Compute-in-Memory Support for SRAM Using Monolithic 3-D Integration.
IEEE Micro, 2019

Technology-Assisted Computing-In-Memory Design for Matrix Multiplication Workloads.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

Programmable Non-Volatile Memory Design Featuring Reconfigurable In-Memory Operations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Harnessing Emerging Technology for Compute-in-Memory Support.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018