Sumitha George

According to our database1, Sumitha George authored at least 12 papers between 2016 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
Optimization of Intercache Traffic Entanglement in Tagless Caches With Tiling Opportunities.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Integrated CAM-RAM Functionality using Ferroelectric FETs.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

2019
Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs.
IEEE Des. Test, 2019

2018
Symmetric 2-D-Memory Access to Multidimensional Data.
IEEE Trans. Very Large Scale Integr. Syst., 2018

MDACache: Caching for Multi-Dimensional-Access Memories.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Harnessing Emerging Technology for Compute-in-Memory Support.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

2017
Advancing Nonvolatile Computing With Nonvolatile NCFET Latches and Flip-Flops.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Harnessing ferroelectrics for non-volatile memories and logic.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

2016
Enabling Internet-of-Things with Opportunities Brought by Emerging Devices, Circuits and Architectures.
Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016

Device Circuit Co Design of FEFET Based Logic for Low Voltage Processors.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Ferroelectric Transistor based Non-Volatile Flip-Flop.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Nonvolatile memory design based on ferroelectric FETs.
Proceedings of the 53rd Annual Design Automation Conference, 2016


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