Jia-Min Shieh
According to our database1,
Jia-Min Shieh
authored at least 4 papers
between 2009 and 2018.
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Bibliography
2018
SiO<sub>2</sub> tunneling and Si<sub>3</sub>N<sub>4</sub>/HfO<sub>2</sub> trapping layers formed with low temperature processes on gate-all-around junctionless charge-trapping flash memory devices.
Microelectron. Reliab., 2018
A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2009
Trend transformation of drain-current degradation under drain-avalanche hot-carrier stress for CLC n-TFTs.
Microelectron. Reliab., 2009