Anuradha Srinivasan

According to our database, Anuradha Srinivasan authored at least 14 papers between 2018 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

A Standardized 20-Tb/s Bandwidth Scalable Heterogeneous 2.5-D System Supporting Assembly Time Workload-Dependent Chiplet Configurations.

Srivatsa Rangachar Srinivasa, Dileep John Kurian, Paolo A. Aseron, Prerna Budhkar, Vinayak Honkote, Dan Lake, Mikhail J. Moiseev, Robert J. Munoz, Anuradha Srinivasan, Tanay Karnik

IEEE J. Solid State Circuits, January, 2026

2025

A Synchronous 13.1 GHz Backside Resonant Clocking Mesh Implemented on a Graphics Core in an 18A Class Technology.

Ragh Kuttappa, Vinayak Honkote, Amreesh Rao, Gaurav Kamalkar, Kailash Chandrashekar, Eric Finley, Chaitanya Sankuratri, Faran Rafiq, Robert Orton, Nils Hernandez, Anuradha Srinivasan, Tanay Karnik

IEEE Solid State Circuits Lett., 2025

A 300MB SRAM, 20Tb/s Bandwidth Scalable Heterogenous 2.5D System Inferencing Simultaneous Streams Across 20 Chiplets with Workload-Dependent Configurations.

Srivatsa Rangachar Srinivasa, Dileep Kurian, Paolo A. Aseron, Prerna Budhkar, Arun Radhakrishnan, Alejandro Cardenas Lopez, Jainaveen Sundaram, Vinayak Honkote, Leonid Azarenkov, Dan Lake, Jaykant Timbadiya, Mikhail J. Moiseev, Brando Perez Esparza, Ronald Kalim, Erika Ramirez Lozano, Mukesh Bhartiya, Sriram Muthukumar, Satish Yada, Sureshbabu Kadavakollu, Saransh Chhabra, Kamakhya Prasad Sahu, James Greensky, Xavier Brun, Esdras Juarez Hernandez, Robert Munoz, Thomas P. Thomas, Shawna Liff, Vivek De, Anuradha Srinivasan, Tanay Karnik

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

System-Level Validation Across Multiple Platforms to build a Robust 2.5D Multi Foundry Chiplet Solution.

Srivatsa Rangachar Srinivasa, Dileep Kurian, Paolo A. Aseron, Prerna Budhkar, Vinayak Honkote, Dan Lake, Jaykant Timbadiya, Satish Yada, Suresh Kadavakollu, James Greensky, Gauthaman Murali, Anuradha Srinivasan, Ragh Kuttappa, Tanay Karnik

Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

A 68 TOPS/W, 256MB SRAM Sparse GEMM Accelerator Tiled Across 16, 4nm Near Memory Compute (NMC) Chiplets Disaggregated 2.5D System.

Srivatsa Rangachar Srinivasa, Prerna Budhkar, Gauthaman Murali, Vui Seng Chua, Paolo A. Aseron, Vinayak Honkote, Ravi R. Iyer, Nilesh Jain, Dileep John Kurian, Anuradha Srinivasan, Tanay Karnik

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

A High-Performance Passive Base System for Distributed AI/Media Acceleration.

Ragh Kuttappa, Jainaveen Sundaram, Srivatsa Rangachar Srinivasa, Paolo A. Aseron, Gauthaman Murali, Vinayak Honkote, Prerna Budhkar, Dileep Kurian, Ronald Kalim, Thomas P. Thomas, Anuradha Srinivasan, Tanay Karnik

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024

A 3.2GHz-15GHz Low Jitter Resonant Clock Featuring Rotary Traveling Wave Oscillators in Intel 4 CMOS for 3D Heterogeneous Multi-Die Systems.

Vinayak Honkote, Ragh Kuttappa, Jainaveen Sundaram, Satish Yada, Chinnusamy Kalimuthu, Juhi Patil, Richard Lee, Cristan Paulino, Paolo A. Aseron, Trang Nguyen, Amreesh Rao, Dileep Kurian, Mingming Xu, Yan Song, Tanay Karnik, Anuradha Srinivasan, Vivek De

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2022

Design Methodology for Scalable 2.5D/3D Heterogenous Tiled Chiplet Systems.

Srivatsa Rangachar Srinivasa, Jainaveen Sundaram Priya, Dileep Kurian, Erika Ramirez Lozano, Satish Yada, Saransh Chhabra, Kamakhya Prasad Sahu, Paolo A. Aseron, Ronald Kalim, Anuradha Srinivasan, Tanay Karnik

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Resonant Rotary Clock Synchronization with Active and Passive Silicon Interposer.

Ragh Kuttappa, Baris Taskin, Vinayak Honkote, Satish Yada, Jainaveen Sundaram, Dileep Kurian, Tanay Karnik, Anuradha Srinivasan

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Trends and Opportunities for SRAM Based In-Memory and Near-Memory Computation.

Srivatsa Srinivasa, Akshay Krishna Ramanathan, Jainaveen Sundaram, Dileep Kurian, Srinivasan Gopal, Nilesh Jain, Anuradha Srinivasan, Ravi R. Iyer, Vijaykrishnan Narayanan, Tanay Karnik

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

A 93 TOPS/Watt Near-Memory Reconfigurable SAD Accelerator for HEVC/AV1/JEM Encoding.

Jainaveen Sundaram, Srivatsa Rangachar Srinivasa, Dileep Kurian, Indranil Chakraborty, Sirisha Rani Kale, Nilesh Jain, Tanay Karnik, Ravi R. Iyer, Anuradha Srinivasan

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Design and Integration of a Distributed, Autonomous and Collaborative Multi-Robot System for Exploration in Unknown Environments.

Vinayak Honkote, Dibyendu Ghosh, Karthik Narayanan, Ankit Gupta, Anuradha Srinivasan

Proceedings of the 2020 IEEE/SICE International Symposium on System Integration, 2020

2019

A Distributed Autonomous and Collaborative Multi-Robot System Featuring a Low-Power Robot SoC in 22nm CMOS for Integrated Battery-Powered Minibots.

Vinayak Honkote, Dileep Kurian, Sriram Muthukumar, Dibyendu Ghosh, Satish Yada, Kartik Jain, Bradley Jackson, Ilya Klotchkov, Mallikarjuna Rao Nimmagadda, Shreela Dattawadkar, Pranjali Deshmukh, Ankit Gupta, Jaykant Timbadiya, Ravi Pali, Karthik Narayanan, Saksham Soni, Saransh Chhabra, Praveen Dhama, N. Sreenivasulu, Jisna Kollikunnel, Sureshbabu Kadavakollu, Vijay Deepak Sivaraj, Paolo A. Aseron, Leonid Azarenkov, Nancy Robinson, Arun Radhakrishnan, Mikhail J. Moiseev, Ganeshram Nandakumar, Akhila Madhukumar, Roman Popov, Kamakhya Prasad Sahu, Ramesh Peguvandla, Alberto Del Rio Ruiz, Mukesh Bhartiya, Anuradha Srinivasan, Vivek De

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018

A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS.

Tanay Karnik, Dileep Kurian, Paolo A. Aseron, Richard Dorrance, Erkan Alpman, Angela Nicoara, Roman Popov, Leonid Azarenkov, Mikhail J. Moiseev, Li Zhao, Santosh Ghosh, Rafael Misoczki, Ankit Gupta, M. Akhila, Sriram Muthukumar, Saurabh Bhandari, Satish Yada, Kartik Jain, Robert Flory, Chanitnan Kanthapanit, Eduardo Quijano, Bradley Jackson, Hao Luo, Suhwan Kim, Vaibhav A. Vaidya, Adel Elsherbini, Renzhi Liu, Farhana Sheikh, Omesh Tickoo, Ilya Klotchkov, Manoj R. Sastry, Sheldon Sun, Mukesh Bhartiya, Anuradha Srinivasan, Yatin Hoskote, Hong Wang, Vivek De

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018