Gauthaman Murali

According to our database, Gauthaman Murali authored at least 16 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

On Continuing DNN Accelerator Architecture Scaling Using Tightly Coupled Compute-on-Memory 3-D ICs.

Gauthaman Murali, Aditya Iyer, Lingjun Zhu, Jianming Tong, Francisco Muñoz-Martínez, Srivatsa Rangachar Srinivasa, Tanay Karnik, Tushar Krishna, Sung Kyu Lim

IEEE Trans. Very Large Scale Integr. Syst., October, 2023

A PPA Study of Reinforced Placement Parameter Autotuning: Pseudo-3D vs. True-3D Placers.

Gauthaman Murali, Anthony Agnesina, Sung Kyu Lim

ACM Trans. Design Autom. Electr. Syst., September, 2023

3DNN-Xplorer: A Machine Learning Framework for Design Space Exploration of Heterogeneous 3D DNN Accelerators.

Gauthaman Murali, Aditya Iyer, Navneeth Ravichandran, Sung Kyu Lim

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022

A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs.

Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Design Automation and Test Solutions for Monolithic 3D ICs.

Lingjun Zhu, Arjun Chaudhuri, Sanmitra Banerjee, Gauthaman Murali, Pruek Vanna-Iampikul, Krishnendu Chakrabarty, Sung Kyu Lim

ACM J. Emerg. Technol. Comput. Syst., 2022

ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs.

Gauthaman Murali, Sandra Maria Shaji, Anthony Agnesina, Guojie Luo, Sung Kyu Lim

Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

2021

Heterogeneous Mixed-Signal Monolithic 3-D In-Memory Computing Using Resistive RAM.

Gauthaman Murali, Xiaoyu Sun, Shimeng Yu, Sung Kyu Lim

IEEE Trans. Very Large Scale Integr. Syst., 2021

Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems.

Gauthaman Murali, Heechun Park, Eric Qin, Hakki Mert Torun, Majid Ahadi Dolatsara, Madhavan Swaminathan, Tushar Krishna, Sung Kyu Lim

IEEE Trans. Very Large Scale Integr. Syst., 2021

ParaMitE: Mitigating Parasitic CNFETs in the Presence of Unetched CNTs.

Sanmitra Banerjee, Arjun Chaudhuri, Jinwoo Kim, Gauthaman Murali, Mark Nelson, Sung Kyu Lim, Krishnendu Chakrabarty

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Heterogeneous 3D ICs: Current Status and Future Directions for Physical Design Technologies.

Gauthaman Murali, Sung Kyu Lim

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse.

Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim

IEEE Trans. Very Large Scale Integr. Syst., 2020

Advances in Design and Test of Monolithic 3-D ICs.

Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Jinwoo Kim, Gauthaman Murali, Edward Lee, Daehyun Kim, Sung Kyu Lim, Saibal Mukhopadhyay, Krishnendu Chakrabarty

IEEE Des. Test, 2020

Statistical Array Allocation and Partitioning for Compute In-Memory Fabrics.

Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury

Proceedings of the VLSI-SoC: Design Trends, 2020

Breaking Barriers: Maximizing Array Utilization for Compute in-Memory Fabrics.

Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung Kyu Lim, Arijit Raychowdhury

Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

RTL-to-GDS Design Tools for Monolithic 3D ICs.

Jinwoo Kim, Gauthaman Murali, Pruek Vanna-Iampikul, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty, Saibal Mukhopadhyay, Sung Kyu Lim

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019

Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse.

Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, Sung Kyu Lim

Proceedings of the 56th Annual Design Automation Conference 2019, 2019