Nael Mizanur Rahman
Orcid: 0000-0002-3556-838X
According to our database1,
Nael Mizanur Rahman
authored at least 19 papers
between 2017 and 2024.
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Bibliography
2024
PRESTO: A Processing-in-Memory-Based k-SAT Solver Using Recurrent Stochastic Neural Network With Unsupervised Learning.
IEEE J. Solid State Circuits, July, 2024
High Performance Compute Accelerators for Radio Frequency Signal Processing Applications.
PhD thesis, 2024
BeamCIM: A Compute-In-Memory based Broadband Beamforming Accelerator using Linear Embedding.
Proceedings of the IEEE Radio and Wireless Symposium, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Measurement of Aging Effect in a Digitally Controlled Inductive Voltage Regulator in 65nm.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
2023
A 32.5mW Mixed-Signal Processing-in-Memory-Based k-SAT Solver in 65nm CMOS with 74.0% Solvability for 3D-Variable 126-Clause 3-SAT Problems.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
2022
IEEE Trans. Ind. Electron., 2022
Analysis of the Effect of Hot Carrier Injection in An Integrated Inductive Voltage Regulator.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
2020
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse.
IEEE Trans. Very Large Scale Integr. Syst., 2020
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
A Configurable Dual-Mode PRINCE Cipher with Security Aware Pipelining in 65nm for High Throughput Applications.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
A Fully Synthesized Integrated Buck Regulator with Auto-generated GDS-II in 65nm CMOS Process.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
Extracting Side-Channel Leakage from Round Unrolled Implementations of Lightweight Ciphers.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019
2017
Proceedings of the IEEE Global Humanitarian Technology Conference, 2017