Ashish Srivastava

According to our database, Ashish Srivastava authored at least 32 papers between 2002 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

An efficacious neural network and DNA cryptography-based algorithm for preventing black hole attacks in MANET.

Rahul Chakravorty, Jay Prakash, Ashish Srivastava

Soft Comput., March, 2024

2023

Internet of Low-Altitude UAVs (IoLoUA): a methodical modeling on integration of Internet of "Things" with "UAV" possibilities and tests.

Ashish Srivastava, Jay Prakash

Artif. Intell. Rev., March, 2023

Techniques, Answers, and Real-World UAV Implementations for Precision Farming.

Ashish Srivastava, Jay Prakash

Wirel. Pers. Commun., 2023

I See What You Hear: A Vision-Inspired Method to Localize Words.

Mohammad Samragh, Arnav Kundu, Ting-Yao Hu, Aman Chadha, Ashish Srivastava, Minsik Cho, Oncel Tuzel, Devang Naik

Proceedings of the IEEE International Conference on Acoustics, 2023

2022

Correction to: Edge Enhancement by Noise Suppression in HSI Color Model of UAV Video with Adaptive Thresholding.

Ashish Srivastava, Jay Prakash

Wirel. Pers. Commun., 2022

Edge Enhancement by Noise Suppression in HSI Color Model of UAV Video with Adaptive Thresholding.

Ashish Srivastava, Jay Prakash

Wirel. Pers. Commun., 2022

CDF based dual transform approach for UAV video visual enhancement in RGB model.

Ashish Srivastava, Jay Prakash

Int. J. Syst. Assur. Eng. Manag., 2022

2021

Machine learning approach for automatic diagnosis of Chlorosis in Vigna mungo leaves.

Chandrasen Pandey, Neeraj Baghel, Malay Kishore Dutta, Ashish Srivastava, Nandlal Choudhary

Multim. Tools Appl., 2021

VirLeafNet: Automatic analysis and viral disease diagnosis using deep-learning in <i>Vigna mungo</i> plant.

Rakesh Chandra Joshi, Manoj Kaushik, Malay Kishore Dutta, Ashish Srivastava, Nandlal Choudhary

Ecol. Informatics, 2021

Future FANET with application and enabling techniques: Anatomization and sustainability issues.

Ashish Srivastava, Jay Prakash

Comput. Sci. Rev., 2021

NL-Augmenter: A Framework for Task-Sensitive Natural Language Augmentation.

Kaustubh D. Dhole, Varun Gangal, Sebastian Gehrmann, Aadesh Gupta, Zhenhao Li, Saad Mahamood, Abinaya Mahendiran, Simon Mille, Ashish Srivastava, Samson Tan, Tongshuang Wu, Jascha Sohl-Dickstein, Jinho D. Choi, Eduard H. Hovy, Ondrej Dusek, Sebastian Ruder, Sajant Anand, Nagender Aneja, Rabin Banjade, Lisa Barthe, Hanna Behnke, Ian Berlot-Attwell, Connor Boyle, Caroline Brun, Marco Antonio Sobrevilla Cabezudo, Samuel Cahyawijaya, Emile Chapuis, Wanxiang Che, Mukund Choudhary, Christian Clauss, Pierre Colombo, Filip Cornell, Gautier Dagan, Mayukh Das, Tanay Dixit, Thomas Dopierre, Paul-Alexis Dray, Suchitra Dubey, Tatiana Ekeinhor, Marco Di Giovanni, Rishabh Gupta, Rishabh Gupta, Louanes Hamla, Sang Han, Fabrice Harel-Canada, Antoine Honore, Ishan Jindal, Przemyslaw K. Joniak, Denis Kleyko, Venelin Kovatchev, et al.

CoRR, 2021

2020

Role of Antenna in Flying Adhoc Networks Communication: Provocation and Open Issues.

Ashish Srivastava, Jay Prakash

Proceedings of the Intelligent Systems Design and Applications, 2020

2008

A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance.

Ashish Srivastava, Kaviraj Chopra, Saumil Shah, Dennis Sylvester, David T. Blaauw

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Statistical Timing Analysis: From Basic Principles to State of the Art.

David T. Blaauw, Kaviraj Chopra, Ashish Srivastava, Louis Scheffer

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007

Low-Power-Design Space Exploration Considering Process Variation Using Robust Optimization.

Ashish Srivastava, T. Kachru, Dennis Sylvester

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Computer-Aided Design for Low-Power Robust Computing in Nanoscale CMOS.

Dennis Sylvester, Ashish Srivastava

Proc. IEEE, 2007

2005

Statistical Analysis and Optimization for VLSI: Timing and Power

Ashish Srivastava, Dennis Sylvester, David T. Blaauw

Series on Integrated Circuits and Systems, Springer, ISBN: 978-0-387-26528-5, 2005

Discrete Vt assignment and gate sizing using a self-snapping continuous formulation.

Saumil Shah, Ashish Srivastava, Dushyant Sharma, Dennis Sylvester, David T. Blaauw, Vladimir Zolotov

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation.

Kaviraj Chopra, Saumil Shah, Ashish Srivastava, David T. Blaauw, Dennis Sylvester

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance.

Ashish Srivastava, Saumil Shah, Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Stephen W. Director

Proceedings of the 42nd Design Automation Conference, 2005

2004

Statistical analysis of subthreshold leakage current for VLSI circuits.

Rajeev R. Rao, Ashish Srivastava, David T. Blaauw, Dennis Sylvester

IEEE Trans. Very Large Scale Integr. Syst., 2004

Minimizing total power by simultaneous V_dd/V_th assignment.

Ashish Srivastava, Dennis Sylvester

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

A new algorithm for improved VDD assignment in low power dual VDD systems.

Sarvesh H. Kulkarni, Ashish Srivastava, Dennis Sylvester

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

A general framework for probabilistic low-power design space exploration considering process variation.

Ashish Srivastava, Dennis Sylvester

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Concurrent Sizing, Vdd and Vth Assignment for Low-Power Design.

Ashish Srivastava, Dennis Sylvester, David T. Blaauw

Proceedings of the 2004 Design, 2004

Power minimization using simultaneous gate sizing, dual-Vdd and dual-Vth assignment.

Ashish Srivastava, Dennis Sylvester, David T. Blaauw

Proceedings of the 41th Design Automation Conference, 2004

Statistical optimization of leakage power considering process variations using dual-Vth and sizing.

Ashish Srivastava, Dennis Sylvester, David T. Blaauw

Proceedings of the 41th Design Automation Conference, 2004

2003

An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages.

Robert Bai, Sarvesh H. Kulkarni, Wesley Kwong, Ashish Srivastava, Dennis Sylvester, David T. Blaauw

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Statistical estimation of leakage current considering inter- and intra-die process variation.

Rajeev R. Rao, Ashish Srivastava, David T. Blaauw, Dennis Sylvester

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Pushing ASIC performance in a power envelope.

Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni

Proceedings of the 40th Design Automation Conference, 2003

Minimizing total power by simultaneous Vdd/Vth assignment.

Ashish Srivastava, Dennis Sylvester

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

Modeling and analysis of leakage power considering within-die process variations.

Ashish Srivastava, Robert Bai, David T. Blaauw, Dennis Sylvester

Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002