Sarvesh H. Kulkarni

According to our database1, Sarvesh H. Kulkarni authored at least 12 papers between 2003 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
A 0.9-μm<sup>2</sup> 1T1R Bit Cell in 14-nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming.
IEEE J. Solid State Circuits, 2017

2016
A High-Density Metal-Fuse Technology Featuring a 1.6 V Programmable Low-Voltage Bit Cell With Integrated 1 V Charge Pumps in 22 nm Tri-Gate CMOS.
IEEE J. Solid State Circuits, 2016

2010
A 4 kb Metal-Fuse OTP-ROM Macro Featuring a 2 V Programmable 1.37 μ m <sup>2</sup> <i>1T1R</i> Bit Cell in 32 nm High-k Metal-Gate CMOS.
IEEE J. Solid State Circuits, 2010

2008
Design-Time Optimization of Post-Silicon Tuned Circuits Using Adaptive Body Bias.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

A 1.1 GHz 12 µA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications.
IEEE J. Solid State Circuits, 2008

2007
A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
Power Distribution Techniques for Dual VDD Circuits.
J. Low Power Electron., 2006

A statistical framework for post-silicon tuning through body bias clustering.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

2004
High performance level conversion for dual V<sub>DD</sub> design.
IEEE Trans. Very Large Scale Integr. Syst., 2004

A new algorithm for improved VDD assignment in low power dual VDD systems.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

2003
An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Pushing ASIC performance in a power envelope.
Proceedings of the 40th Design Automation Conference, 2003


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