Atousa Jafari

According to our database1, Atousa Jafari authored at least 7 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Improved Arithmetic Performance by Combining Stateful and Non-Stateful Logic in Resistive Random Access Memory 1T-1R Crossbars.
Adv. Intell. Syst., March, 2024

2023
Design Limitations in Oxide-Based Memristive Ternary Content Addressable Memories.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Power Side-Channel Attacks and Countermeasures on Computation-in-Memory Architectures and Technologies.
Proceedings of the IEEE European Test Symposium, 2023

2022
Voltage Tuning for Reliable Computation in Emerging Resistive Memories.
Proceedings of the 40th IEEE VLSI Test Symposium, 2022

A failure analysis framework of ReRAM In-Memory Logic operations.
Proceedings of the IEEE International Test Conference in Asia, 2022

MVSTT: A Multi-Value Computation-in-Memory based on Spin-Transfer Torque Memories.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2020
Timing Reliability Improvement of Master-Slave Flip-Flops in the Presence of Aging Effects.
IEEE Trans. Circuits Syst., 2020


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