Dennis Gnad

Orcid: 0000-0002-2839-4692

Affiliations:
  • Karlsruhe Institute of Technology, Germany


According to our database1, Dennis Gnad authored at least 40 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
MaliGNNoma: GNN-Based Malicious Circuit Classifier for Secure Cloud FPGAs.
CoRR, 2024

Covert-Hammer: Coordinating Power-Hammering on Multi-tenant FPGAs via Covert Channels.
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

2023
Active and Passive Physical Attacks on Neural Network Accelerators.
IEEE Des. Test, October, 2023

New Approaches of Side-Channel Attacks Based on Chip Testing Methods.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023

JitSCA: Jitter-based Side-Channel Analysis in Picoscale Resolution.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023

Stealthy Logic Misuse for Power Analysis Attacks in Multi-Tenant FPGAs (Extended Version).
IACR Cryptol. ePrint Arch., 2023

Enabling In-Field Parametric Testing for RISC-V Cores.
Proceedings of the IEEE International Test Conference, 2023

SLM ISA and Hardware Extensions for RISC-V Processors.
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

Automated Masking of FPGA-Mapped Designs.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Remote Identification of Neural Network FPGA Accelerators by Power Fingerprints.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Power2Picture: Using Generative CNNs for Input Recovery of Neural Network Accelerators through Power Side-Channels on FPGAs.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

Power Side-Channel Attacks and Countermeasures on Computation-in-Memory Architectures and Technologies.
Proceedings of the IEEE European Test Symposium, 2023

FPGANeedle: Precise Remote Fault Attacks from FPGA to CPU.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
Remote Fault Attacks in Multitenant Cloud FPGAs.
IEEE Des. Test, 2022

Counterfeit Detection and Prevention in Additive Manufacturing Based on Unique Identification of Optical Fingerprints of Printed Structures.
IEEE Access, 2022

Breaking an FPGA-Integrated NIST SP 800-193 Compliant TRNG Hard-IP Core with On-Chip Voltage-Based Fault Attacks.
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Reverse Engineering Neural Network Folding with Remote FPGA Power Analysis.
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

Data Leakage through Self-Terminated Write Schemes in Memristive Caches.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
Voltage-Based Covert Channels Using FPGAs.
ACM Trans. Design Autom. Electr. Syst., 2021

Is your secure test infrastructure secure enough? : Attacks based on delay test patterns using transient behavior analysis.
Proceedings of the IEEE International Test Conference, 2021

LoopBreaker: Disabling Interconnects to Mitigate Voltage-Based Attacks in Multi-Tenant FPGAs.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Remote and Stealthy Fault Attacks on Virtualized FPGAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Stealthy Logic Misuse for Power Analysis Attacks in Multi-Tenant FPGAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
AngriffedurchFernzugriffaufFPGAHardware.
Proceedings of the Ausgezeichnete Informatikdissertationen 2020., 2020

Remote Attacks on FPGA Hardware
PhD thesis, 2020

CPAmap: On the Complexity of Secure FPGA Virtualization, Multi-Tenancy, and Physical Design.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

Remote Electrical-level Security Threats to Multi-Tenant FPGAs.
IEEE Des. Test, 2020

2019
Mitigating Electrical-level Attacks towards Secure Multi-Tenant FPGAs in the Cloud.
ACM Trans. Reconfigurable Technol. Syst., 2019

Leaky Noise: New Side-Channel Attack Vectors in Mixed-Signal IoT Devices.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019

Active Fences against Voltage-based Side Channels in Multi-Tenant FPGAs.
IACR Cryptol. ePrint Arch., 2019

Voltage-based Covert Channels in Multi-Tenant FPGAs.
IACR Cryptol. ePrint Arch., 2019

2018
An Experimental Evaluation and Analysis of Transient Voltage Fluctuations in FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., 2018

FPGAhammer: Remote Voltage Fault Attacks on Shared FPGAs, suitable for DFA on AES.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

Remote Inter-Chip Power Analysis Side-Channel Attacks at Board-Level.
IACR Cryptol. ePrint Arch., 2018

An Inside Job: Remote Power Analysis Attacks on FPGAs.
IACR Cryptol. ePrint Arch., 2018

Checking for Electrical Level Security Threats in Bitstreams for Multi-tenant FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2018

2017
Voltage drop-based fault attacks on FPGAs using valid bitstreams.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Analysis of transient voltage fluctuations in FPGAs.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

2015
Variability-aware dark silicon management in on-chip many-core systems.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Hayat: harnessing dark silicon and variability for aging deceleration and balancing.
Proceedings of the 52nd Annual Design Automation Conference, 2015


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