David A. Papa

According to our database1, David A. Papa authored at least 21 papers between 2004 and 2013.

Collaborative distances:

Timeline

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Bibliography

2013
Multi-Objective Optimization in Physical Synthesis of Integrated Circuits
Lecture Notes in Electrical Engineering 166, Springer, ISBN: 978-1-4614-1355-4, 2013

2011
Physical Synthesis with Clock-Network Optimization for Large Systems on Chips.
IEEE Micro, 2011

Quantifying academic placer performance on custom designs.
Proceedings of the 2011 International Symposium on Physical Design, 2011

2010
Speeding Up Physical Synthesis with Transactional Timing Analysis.
IEEE Des. Test Comput., 2010

Ultra-fast interconnect driven cell cloning for minimizing critical path delay.
Proceedings of the 2010 International Symposium on Physical Design, 2010

SPIRE: A retiming-based physical-synthesis transformation system.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

2009
Incremental Verification with Error Detection, Diagnosis, and Visualization.
IEEE Des. Test Comput., 2009

2008
Fine Control of Local Whitespace in Placement.
VLSI Design, 2008

RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2008

Pyramids: an efficient computational geometry-based approach for timing-driven placement.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Path smoothing via discrete optimization.
Proceedings of the 45th Design Automation Conference, 2008

2007
Hypergraph Partitioning and Clustering.
Proceedings of the Handbook of Approximation Algorithms and Metaheuristics., 2007

InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Capo: Congestion-Driven Placement for Standard-cell and RTL Netlists with Incremental Capability.
Proceedings of the Modern Circuit Placement, Best Practices and Results, 2007

2006
Min-cut floorplacement.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006

Satisfying whitespace requirements in top-down placement.
Proceedings of the 2006 International Symposium on Physical Design, 2006

Utility of the OpenAccess database in academic research.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Early research experience with OpenAccess gear: an open source development environment for physical design.
Proceedings of the 2005 International Symposium on Physical Design, 2005

Capo: robust and scalable open-source min-cut floorplacer.
Proceedings of the 2005 International Symposium on Physical Design, 2005

2004
Unification of partitioning, placement and floorplanning.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Constructive benchmarking for placement.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004


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