Earl E. Swartzlander Jr.
According to our database^{1},
Earl E. Swartzlander Jr.
authored at least 212 papers
between 1973 and 2019.
Collaborative distances:
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Bibliography
2019
IEEE Trans. Computers, 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the Handbook of Memristor Networks., 2019
2018
Designs of Approximate FloatingPoint Multipliers with Variable Accuracy for ErrorTolerant Applications.
J. Signal Process. Syst., 2018
Design of HighSpeed WideWord Hybrid ParallelPrefix/CarrySelect and Skip Adders.
J. Signal Process. Syst., 2018
IEEE Trans. Consumer Electron., 2018
IEEE Micro, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2017
Guest Editorial: Introduction to the Special Issue on Emerging Technologies and Designs for ApplicationSpecific Computing.
IEEE Trans. Emerg. Top. Comput., 2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEEE Trans. Computers, 2017
Proceedings of the 2017 IEEE International Conference on IC Design and Technology, 2017
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017
2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
IEEE Trans. Computers, 2016
Proceedings of the 7th IEEE Annual Ubiquitous Computing, 2016
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016
2015
IEICE Electron. Express, 2015
Proceedings of the 22nd IEEE Symposium on Computer Arithmetic, 2015
Exploiting asymmetry in Boothencoded multipliers for reduced energy multiplication.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015
2014
Proceedings of the FieldCoupled Nanocomputing  Paradigms, Progress, and Perspectives, 2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
IEEE Trans. Computers, 2014
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014
HighSpeed Computer Arithmetic.
Proceedings of the Computing Handbook, 2014
2013
IEEE Trans. on CAD of Integrated Circuits and Systems, 2013
IEEE Trans. Computers, 2013
Proceedings of the IEEE, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 8th International Design and Test Symposium, 2013
Proceedings of the 24th International Conference on ApplicationSpecific Systems, 2013
Proceedings of the 21st IEEE Symposium on Computer Arithmetic, 2013
Proceedings of the 21st IEEE Symposium on Computer Arithmetic, 2013
Proceedings of the 2013 Asilomar Conference on Signals, 2013
Proceedings of the 2013 Asilomar Conference on Signals, 2013
2012
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
IEEE Trans. Computers, 2012
Comput. Networks, 2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Proceedings of the International Symposium on Physical Design, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 23rd IEEE International Conference on ApplicationSpecific Systems, 2012
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012
Modified nonrestoring division algorithm with improved delay profile and error correction.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012
2011
J. Signal Process. Syst., 2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Proceedings of the 2011 International Symposium on Physical Design, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011
A floatingpoint fused FFT butterfly arithmetic unit with Merged MultipleConstant Multipliers.
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011
2010
IEEE Trans. Computers, 2010
IEEE Trans. Computers, 2010
IEEE Trans. Computers, 2010
A Rounding Method to Reduce the Required Multiplier Precision for Goldschmidt Division.
IEEE Trans. Computers, 2010
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
A novel technique for tunable mismatch shaping in oversampled digitaltoanalog converters.
Proceedings of the IEEE International Conference on Acoustics, 2010
2009
IEEE Trans. Computers, 2009
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures, 2009
Proceedings of the 20th IEEE International Conference on ApplicationSpecific Systems, 2009
2008
Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008
Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008
J. Signal Process. Syst., 2008
J. Signal Process. Syst., 2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
Proceedings of the 26th International Conference on Computer Design, 2008
Proceedings of the IEEE International Conference on Acoustics, 2008
2007
J. VLSI Signal Process., 2007
The HazardFree Superscalar Pipeline Fast Fourier Transform Architecture and Algorithm.
Proceedings of the VLSISoC: Advanced Topics on Systems on a Chip, 2007
The hazardfree superscalar pipeline fast fourier transform algorithm and architecture.
Proceedings of the IFIP VLSISoC 2007, 2007
Contentionfree switchbased implementation of 1024point Radix2 Fourier Transform Engine.
Proceedings of the 25th International Conference on Computer Design, 2007
Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH18 2007), 2007
2006
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
Proceedings of the 2006 IEEE International Conference on ApplicationSpecific Systems, 2006
Proceedings of the 2006 IEEE International Conference on ApplicationSpecific Systems, 2006
2005
Proceedings of the 5th IEEE International Workshop on SystemonChip for RealTime Applications (IWSOC 2005), 2005
Proceedings of the 16th IEEE International Conference on ApplicationSpecific Systems, 2005
Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH17 2005), 2005
2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 15th IEEE International Conference on ApplicationSpecific Systems, 2004
2003
J. VLSI Signal Process., 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 18th IEEE International Symposium on Defect and FaultTolerance in VLSI Systems (DFT 2003), 2003
Proceedings of the 14th IEEE International Conference on ApplicationSpecific Systems, 2003
2002
J. VLSI Signal Process., 2002
IEEE Trans. Signal Process., 2002
Proceedings of the 13th IEEE International Conference on ApplicationSpecific Systems, 2002
Implementation of a Single Chip, Pipelined, Complex, OneDimensional Fast FourierTransform in 0.25 mu m BulkCMOS.
Proceedings of the 13th IEEE International Conference on ApplicationSpecific Systems, 2002
2001
IEEE Trans. Signal Process., 2001
IEEE Trans. Computers, 2001
Proceedings of the IEEE International Conference on Acoustics, 2001
Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001
Enhanced Concurrent Error Correcting Arithmetic Unit Design Using Alternating Logic.
Proceedings of the 16th IEEE International Symposium on Defect and FaultTolerance in VLSI Systems (DFT 2001), 2001
Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith15 2001), 2001
2000
HighSpeed CORDIC Based on an Overlapped Architecture and a Novel sigmaPrediction Method.
J. VLSI Signal Process., 2000
IEEE Trans. Computers, 2000
A SerialParallel Architecture for TwoDimensional Discrete Cosine and Inverse Discrete Cosine Transforms.
IEEE Trans. Computers, 2000
IEEE Trans. Computers, 2000
Proceedings of the 15th IEEE International Symposium on Defect and FaultTolerance in VLSI Systems (DFT 2000), 2000
Proceedings of the 12th IEEE International Conference on ApplicationSpecific Systems, 2000
1999
A parallel implementation of the 2D discrete wavelet transform without interprocessor communications.
IEEE Trans. Signal Process., 1999
Multidimensional systolic arrays for the implementation of discrete Fourier transforms.
IEEE Trans. Signal Process., 1999
Parallel Implementation of Multidimensional Transforms without Interprocessor Communication.
IEEE Trans. Computers, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
HighSpeed CORDIC Architecture Based on Redundant Sum Formation and Overlapped sSelection.
Proceedings of the IEEE International Conference On Computer Design, 1999
Proceedings of the 14th International Symposium on Defect and FaultTolerance in VLSI Systems (DFT '99), 1999
Proceedings of the 14th International Symposium on Defect and FaultTolerance in VLSI Systems (DFT '99), 1999
1998
J. VLSI Signal Process., 1998
IEEE Des. Test Comput., 1998
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
Proceedings of the 8th Great Lakes Symposium on VLSI (GLSVLSI '98), 1998
Proceedings of the 13th International Symposium on Defect and FaultTolerance in VLSI Systems (DFT '98), 1998
1997
IEEE Trans. Computers, 1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 1997 Workshop on Defect and FaultTolerance in VLSI Systems (DFT '97), 1997
Proceedings of the 1997 International Conference on ApplicationSpecific Systems, 1997
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH13 '97), 1997
HighSpeed Computer Arithmetic.
Proceedings of the Computer Science and Engineering Handbook, 1997
1996
J. VLSI Signal Process., 1996
Reliab. Comput., 1996
Proceedings of the 1996 IEEE International Conference on Acoustics, 1996
Proceedings of the 1996 IEEE International Conference on Acoustics, 1996
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996
Proceedings of the 1996 International Conference on ApplicationSpecific Systems, 1996
1995
J. VLSI Signal Process., 1995
A software interface and hardware design for variableprecision interval arithmetic.
Reliab. Comput., 1995
IEEE Ann. Hist. Comput., 1995
Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP '95), 1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
FaultTolerant Neural Architectures: The Use of Rotated Operands.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995
An efficient systolic array for the discrete cosine transform based on primefactor decomposition .
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995
Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995
Efficient time redundancy for error correcting innerproduct units and convolvers.
Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995
Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995
Recomputing by Operand Exchanging: A Timeredundancy Approach for Faulttolerant Neural Networks.
Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995
Hardware Design and Arithmetic Algorithms for a VariablePrecision, Interval Arithmetic Coprocessor.
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH12 '95), 1995
Cascaded Implementation of an Iterative InverseSquareRoot Algorithm, with Overflow Lookahead.
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH12 '95), 1995
1994
J. VLSI Signal Process., 1994
Fast multiplier bitproduct matrix reduction using bitordering and parity generation.
J. VLSI Signal Process., 1994
IEEE Trans. Computers, 1994
J. Electron. Test., 1994
Computing, 1994
A Standardized Interface Control Unit for Heterogeneous Digital Signal Processors.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of the Proceedings 1994 International Conference on Parallel and Distributed Systems, 1994
Proceedings of the Proceedings 1994 International Conference on Parallel and Distributed Systems, 1994
Proceedings of the Proceedings 1994 International Conference on Parallel and Distributed Systems, 1994
Proceedings of the Proceedings 1994 International Conference on Parallel and Distributed Systems, 1994
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994
Reliability Estimation for Time Redundant Error Correcting Adders and Multipliers.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994
Proceedings of the International Conference on Application Specific Array Processors, 1994
Proceedings of the International Conference on Application Specific Array Processors, 1994
1993
IEEE Trans. Very Large Scale Integr. Syst., 1993
Proceedings of the Fourth International Workshop on Rapid System Prototyping, 1993
Superpipelined Adder Designs.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993
VLSI Concurrent Error Correcting Adders and Multipliers.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993
Proceedings of the International Conference on ApplicationSpecific Array Processors, 1993
Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993
Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993
1992
J. VLSI Signal Process., 1992
IEEE Trans. Computers, 1992
WaferScale Integration: Architectures and Algorithms  Guest Editors' Introduction.
Computer, 1992
Proceedings of the 6th International Parallel Processing Symposium, 1992
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992
Proceedings of the Application Specific Array Processors, 1992
1991
Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991
Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991
Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991
1990
J. VLSI Signal Process., 1990
J. VLSI Signal Process., 1990
1985
IEEE Trans. Software Eng., 1985
Proceedings of the IEEE International Conference on Acoustics, 1985
VLSI Testing: A Decade of Experience.
Proceedings of the Spring COMPCON'85, 1985
Proceedings of the 7th IEEE Symposium on Computer Arithmetic, 1985
1984
Proceedings of the IEEE International Conference on Acoustics, 1984
1983
IEEE Trans. Computers, 1983
Proceedings of the IEEE International Conference on Acoustics, 1983
1982
IEEE Trans. Computers, 1982
1980
IEEE Trans. Computers, 1980
IEEE Trans. Computers, 1980
Proceedings of the IEEE International Conference on Acoustics, 1980
1979
IEEE Trans. Computers, 1979
IEEE Trans. Computers, 1979
IEEE Trans. Computers, 1979
1978
IEEE Trans. Computers, 1978
Proceedings of the 4th IEEE Symposium on Computer Arithmetic, 1978
1977
Proceedings of the 10th annual workshop on Microprogramming, 1977
1975
IEEE Trans. Computers, 1975
1973
IEEE Trans. Syst. Man Cybern., 1973
Review of "Introduction to Mathematical Techniques in Pattern Recognition" by Harry C. Andrews.
IEEE Trans. Syst. Man Cybern., 1973
IEEE Trans. Inf. Theory, 1973
IEEE Trans. Computers, 1973
IEEE Trans. Computers, 1973
Proceedings of the ACM annual conference, Atlanta, Georgia, USA, August 2729, 1973, 1973