Hung-Chi Han

Orcid: 0000-0001-9900-5618

According to our database1, Hung-Chi Han authored at least 8 papers between 2021 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
Novel Approach to FDSOI Threshold Voltage Model Validated at Cryogenic Temperatures.
IEEE Access, 2023

Design of Low-power Analog Circuits in Advanced Technology Nodes using the $G_{m}/I_{D}$ Approach.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

The Fano Noise Suppression Factor and the $G_{m}/I_{D}$ FoM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Design of Cryo-CMOS Analog Circuits using the $G_{m}/I_{D}$ Approach.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
SEKV-E: Parameter Extractor of Simplified EKV I-V Model for Low-Power Analog Circuits.
IEEE Open J. Circuits Syst., 2022

Comprehensive Design-oriented FDSOI EKV Model.
Proceedings of the 29th International Conference on Mixed Design of Integrated Circuits and System, 2022

Cryogenic RF Characterization and Simple Modeling of a 22 nm FDSOI Technology.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

2021
Cryogenic Characterization of 16 nm FinFET Technology for Quantum Computing.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021


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