Jeffrey Prinzie
Orcid: 0000-0001-9321-315X
According to our database1,
Jeffrey Prinzie
authored at least 8 papers
between 2015 and 2022.
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Bibliography
2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
2021
Tradeoffs in Time-to-Digital Converter Architectures for Harsh Radiation Environments.
IEEE Trans. Instrum. Meas., 2021
2020
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit With High Speed Feed Forward Correction in 65 nm CMOS.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
A Fast Locking 5.8 - 7.2 GHz Fractional-N Synthesizer with Sub-2 us Settling Time in 22 nm FDSOI.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
2019
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
A single-event upset robust, 2.2 GHz to 3.2 GHz, 345 fs jitter PLL with triple-modular redundant phase detector in 65 nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2015
Experimental validation of a compact model for EM reflection and transmission in multi-layered structures.
Proceedings of the 2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings, 2015