Jianan Wen

According to our database, Jianan Wen authored at least 10 papers between 2020 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

RISC-V CPU Design Using RRAM-CMOS Standard Cells.

Markus Fritscher, Max Uhlmann, Philip Ostrovskyy, Daniel Reiser, Junchao Chen, Jianan Wen, Carsten Schulze, Gerhard Kahmen, Dietmar Fey, Marc Reichenbach, Milos Krstic, Christian Wenger

IEEE Trans. Very Large Scale Integr. Syst., September, 2025

ReDiM: An Efficient Strategy for Read Disturb Mitigation in RRAM-Based Accelerators.

Jianan Wen, Andrea Baroni, Alberto Mistroni, Eduardo Pérez, Cristian Zambelli, Christian Wenger, Milos Krstic, Letícia Maria Veiras Bolzani

Proceedings of the 31st IEEE International Symposium on On-Line Testing and Robust System Design, 2025

2024

HyRPF: Hybrid RRAM Prototyping on FPGA.

Daniel Reiser, Johannes Knödtel, Liliia Almeeva, Jianan Wen, Andrea Baroni, Milos Krstic, Marc Reichenbach

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2024

Cycle-Accurate FPGA Emulation of RRAM Crossbar Array: Efficient Device and Variability Modeling with Energy Consumption Assessment.

Jianan Wen, Fabian Luis Vargas, Fukun Zhu, Daniel Reiser, Andrea Baroni, Markus Fritscher, Eduardo Pérez, Marc Reichenbach, Christian Wenger, Milos Krstic

Proceedings of the 25th IEEE Latin American Test Symposium, 2024

Towards Reliable and Energy-Efficient RRAM Based Discrete Fourier Transform Accelerator.

Jianan Wen, Andrea Baroni, Eduardo Pérez, Max Uhlmann, Markus Fritscher, Karthik KrishneGowda, Markus Ulbricht, Christian Wenger, Milos Krstic

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

Prototyping Reconfigurable RRAM-Based AI Accelerators Using the RISC-V Ecosystem and Digital Twins.

Markus Fritscher, Alessandro Veronesi, Andrea Baroni, Jianan Wen, Thorsten Spätling, Mamathamba Kalishettyhalli Mahadevaiah, Norbert Herfurth, Eduardo Pérez, Markus Ulbricht, Marc Reichenbach, Amelie Hagelauer, Milos Krstic

Proceedings of the High Performance Computing, 2023

LUT-based RRAM Model for Neural Accelerator Circuit Simulation.

Max Uhlmann, Tommaso Rizzi, Jianan Wen, Emilio Pérez-Bosch Quesada, Bakr Al Beattie, Karlheinz Ochs, Eduardo Pérez, Philip Ostrovskyy, Corrado Carta, Christian Wenger, Gerhard Kahmen

Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

2022

Evaluating Read Disturb Effect on RRAM based AI Accelerator with Multilevel States and Input Voltages.

Jianan Wen, Andrea Baroni, Eduardo Pérez, Markus Ulbricht, Christian Wenger, Milos Krstic

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

2021

Behavioral Model of Dot-Product Engine Implemented with 1T1R Memristor Crossbar Including Assessment.

Jianan Wen, Markus Ulbricht, Eduardo Pérez, Xin Fan, Milos Krstic

Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

2020

Low-Cost DNN Hardware Accelerator for Wearable, High-Quality Cardiac Arrythmia Detection.

Johnson Loh, Jianan Wen, Tobias Gemmeke

Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020