Markus Fritscher

According to our database, Markus Fritscher authored at least 9 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

An RRAM-based building block for reprogrammable non-uniform sampling ADCs.

Abhinav Vishwakarma, Markus Fritscher, Amelie Hagelauer, Marc Reichenbach

it Inf. Technol., May, 2023

Prototyping Reconfigurable RRAM-Based AI Accelerators Using the RISC-V Ecosystem and Digital Twins.

Markus Fritscher, Alessandro Veronesi, Andrea Baroni, Jianan Wen, Thorsten Spätling, Mamathamba Kalishettyhalli Mahadevaiah, Norbert Herfurth, Eduardo Perez, Markus Ulbricht, Marc Reichenbach, Amelie Hagelauer, Milos Krstic

Proceedings of the High Performance Computing, 2023

One-Transistor-Multiple-RRAM Cells for Energy-Efficient In-Memory Computing.

Max Uhlmann, Emilio Pérez-Bosch Quesada, Markus Fritscher, Eduardo Pérez, Markus Andreas Schubert, Marc Reichenbach, Philip Ostrovskyy, Christian Wenger, Gerhard Kahmen

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations.

Daniel Reiser, Marc Reichenbach, Tommaso Rizzi, Andrea Baroni, Markus Fritscher, Christian Wenger, Cristian Zambelli, Davide Bertozzi

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

2022

Accelerating Veins Simulations by Utilizing Task Parallelism on a HPC Cluster without Introducing Major Inaccuracies.

Markus Fritscher, Gabriel Dengler, Cord Bleibaum, Michael Niebisch, Reinhard German

Proceedings of the 13th International Symposium on Communication Systems, 2022

2021

Mitigating the Effects of RRAM Process Variation on the Accuracy of Artificial Neural Networks.

Markus Fritscher, Johannes Knödtel, Maen Mallah, Stefan Pechmann, Emilio Pérez-Bosch Quesada, Tommaso Rizzi, Christian Wenger, Marc Reichenbach

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021

Simulating large neural networks embedding MLC RRAM as weight storage considering device variations.

Markus Fritscher, Johannes Knödtel, Daniel Reiser, Maen Mallah, Stefan Pechmann, Dietmar Fey, Marc Reichenbach

Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

2020

A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories.

Johannes Knödtel, Markus Fritscher, Daniel Reiser, Dietmar Fey, Marco Breiling, Marc Reichenbach

Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

2019

Simulating Memristive Systems in Mixed-Signal Mode using Commercial Design Tools.

Markus Fritscher, Johannes Knödtel, Marc Reichenbach, Dietmar Fey

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019