Andrea Baroni

Orcid: 0000-0002-5205-0398

According to our database1, Andrea Baroni authored at least 15 papers between 2003 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Design and analysis of an adaptive radiation resilient RRAM subsystem for processing systems in satellites.
Des. Autom. Embed. Syst., June, 2024

Cycle-Accurate FPGA Emulation of RRAM Crossbar Array: Efficient Device and Variability Modeling with Energy Consumption Assessment.
Proceedings of the 25th IEEE Latin American Test Symposium, 2024

Towards Reliable and Energy-Efficient RRAM Based Discrete Fourier Transform Accelerator.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
Quantitative Comparison of Hand Kinematics Measured with a Markerless Commercial Head-Mounted Display and a Marker-Based Motion Capture System in Stroke Survivors.
Sensors, September, 2023

Prototyping Reconfigurable RRAM-Based AI Accelerators Using the RISC-V Ecosystem and Digital Twins.
Proceedings of the High Performance Computing, 2023

A RRAM Characterization System with Flexible Readout Operations using an Integrating ADC.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

2022
A novel immersive virtual reality environment for the motor rehabilitation of stroke patients: A feasibility study.
Frontiers Robotics AI, 2022

End-to-end modeling of variability-aware neural networks based on resistive-switching memory arrays.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Experimental verification and benchmark of in-memory principal component analysis by crosspoint arrays of resistive switching memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Statistical model of program/verify algorithms in resistive-switching memories for in-memory neural network accelerators.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Evaluating Read Disturb Effect on RRAM based AI Accelerator with Multilevel States and Input Voltages.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

2014
Performance assessment of the Smart mAritime saTellite terminal for mUltimedia seRvices and conteNts (SATURN) system.
Proceedings of the 7th Advanced Satellite Multimedia Systems Conference and the 13th Signal Processing for Space Communications Workshop, 2014

2005
Building 3D interactive environments for the children's narrative: a didactic project.
Proceedings of the International Conference on Advances in Computer Entertainment Technology, 2005

2003
Power efficient charge pump in deep submicron standard CMOS technology.
IEEE J. Solid State Circuits, 2003


  Loading...