Vladimir Rozic

Orcid: 0000-0003-3286-3997

According to our database1, Vladimir Rozic authored at least 38 papers between 2009 and 2023.

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Bibliography

2023
A Closer Look at the Chaotic Ring Oscillators based TRNG Design.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023

2021
Design and Analysis of Configurable Ring Oscillators for True Random Number Generation Based on Coherent Sampling.
ACM Trans. Reconfigurable Technol. Syst., 2021

2020
Attacking Hardware Random Number Generators in a Multi-Tenant Scenario.
Proceedings of the 17th Workshop on Fault Detection and Tolerance in Cryptography, 2020

2019
Hardware-Efficient Post-Processing Architectures for True Random Number Generators.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Highly-Portable True Random Number Generator Based on Coherent Sampling.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

A Self-Calibrating True Random Number Generator.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

Design Principles for True Random Number Generators for Security Applications.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
ES-TRNG: A High-throughput, Low-area True Random Number Generator based on Edge Sampling.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

A Closer Look at the Delay-Chain based TRNG.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

The Impact of Pulsed Electromagnetic Fault Injection on True Random Number Generators.
Proceedings of the 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2018

Design and testing methodologies for true random number generators towards industry certification.
Proceedings of the 23rd IEEE European Test Symposium, 2018

Towards inter-vendor compatibility of true random number generators for FPGAs.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
A 5.1<i>μ</i><i>J</i> per point-multiplication elliptic curve cryptographic processor.
Int. J. Circuit Theory Appl., 2017

Lightweight Prediction-Based Tests for On-Line Min-Entropy Estimation.
IEEE Embed. Syst. Lett., 2017

The Monte Carlo PUF.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

A Privacy-Preserving Device Tracking System Using a Low-Power Wide-Area Network.
Proceedings of the Cryptology and Network Security - 16th International Conference, 2017

On-chip jitter measurement for true random number generators.
Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016
Canary Numbers: Design for Light-weight Online Testability of True Random Number Generators.
IACR Cryptol. ePrint Arch., 2016

On the Construction of Hardware-Friendly 4\times 4 and 5\times 5 S-Boxes.
Proceedings of the Selected Areas in Cryptography - SAC 2016, 2016

Evolving Cryptographic Pseudorandom Number Generators.
Proceedings of the Parallel Problem Solving from Nature - PPSN XIV, 2016

Exploring active manipulation attacks on the TERO random number generator.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Iterating Von Neumann's post-processing under hardware constraints.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016


TOTAL: TRNG on-the-fly testing for attack detection using Lightweight hardware.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

PRNGs for Masking Applications and Their Mapping to Evolvable Hardware.
Proceedings of the Smart Card Research and Advanced Applications, 2016

2015
On-the-fly tests for non-ideal true random number generators.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Challenges in designing trustworthy cryptographic co-processors.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Embedded HW/SW platform for on-the-fly testing of true random number generators.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Highly efficient entropy extraction for true random number generators on FPGAs.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2013
Low-energy encryption for medical devices: security adds an extra design dimension.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
PUFs: Myth, Fact or Busted? A Security Evaluation of Physically Unclonable Functions (PUFs) Cast in Silicon (Extended Version).
IACR Cryptol. ePrint Arch., 2012

Three Phase Dynamic Current Mode Logic: A More Secure DyCML to Achieve a More Balanced Power Consumption.
Proceedings of the Information Security Applications - 13th International Workshop, 2012

Design solutions for securing SRAM cell against power analysis.
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012

Experimental evaluation of Physically Unclonable Functions in 65 nm CMOS.
Proceedings of the 38th European Solid-State Circuit conference, 2012

Low-cost implementations of on-the-fly tests for random number generators.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

PUFs: Myth, Fact or Busted? A Security Evaluation of Physically Unclonable Functions (PUFs) Cast in Silicon.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012

2009
FPGA-based testing strategy for cryptographic chips: A case study on Elliptic Curve Processor for RFID tags.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

Random numbers generation: Investigation of narrowtransitions suppression on FPGA.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009


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