Sunghwan Jo
Orcid: 0000-0003-0535-7853
According to our database1,
Sunghwan Jo
authored at least 4 papers
between 2018 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features.
IEEE J. Solid State Circuits, 2023
2022
IEEE J. Solid State Circuits, 2022
2020
IEEE Access, 2020
2018
0.293-mm<sup>2</sup> Fast Transient Response Hysteretic Quasi-V<sup>2</sup> DC-DC Converter With Area-Efficient Time-Domain-Based Controller in 0.35-µm CMOS.
IEEE J. Solid State Circuits, 2018