Sunghwan Jo

According to our database, Sunghwan Jo authored at least 5 papers between 2018 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

CTDM: Resource-Efficient FPGA-Accelerated Simulation of Large-Scale NPU Designs.

Hyunje Jo, Han-Sok Suh, Hyun-Seok Heo, Jinseok Kim, Hyunsung Kim, Boeui Hong, Jungju Oh, Sunghyun Park, Jinwook Oh, Sunghwan Jo, Kangwook Lee, Jae-Sun Seo

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

2023

A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features.

Yesin Ryu, Sung-Gi Ahn, Jaehoon Lee, Jaewon Park, Yong-Ki Kim, Hyochang Kim, Yeong Geol Song, Han-Won Cho, Sunghye Cho, Seung Ho Song, Haesuk Lee, Useung Shin, Jonghyun Ahn, Je-Min Ryu, Sukhan Lee, Kyounghwan Lim, Jungyu Lee, Jeong Hoan Park, Jae-Seung Jeong, Sunghwan Jo, Dajung Cho, Sooyoung Kim, Minsu Lee, Hyunho Kim, Minhwan Kim, Jae San Kim, Jinah Kim, Hyun Gil Kang, Myung-Kyu Lee, Sung-Rae Kim, Young-Cheon Kwon, Young-Yong Byun, Kijun Lee, Sangkil Park, Jaeyoun Youn, Myeong-O. Kim, Kyomin Sohn, SangJoon Hwang, JooYoung Lee

IEEE J. Solid State Circuits, 2023

2022

A 5 Gb/s Time-Interleaved Voltage-Mode Duobinary Encoding Scheme for 3-D-Stacked IC.

Ji-Young Kim, Jongsoo Lee, Ki-Ryong Kim, Sunghwan Jo, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung

IEEE J. Solid State Circuits, 2022

2020

CNN Acceleration With Hardware-Efficient Dataflow for Super-Resolution.

Sumin Lee, Sunghwan Jo, Hong Keun Ahn, Seong-Ook Jung

IEEE Access, 2020

2018

0.293-mm² Fast Transient Response Hysteretic Quasi-V² DC-DC Converter With Area-Efficient Time-Domain-Based Controller in 0.35-µm CMOS.

Dong-Hoon Jung, Ki-Ryong Kim, Sunghwan Jo, Seong-Ook Jung

IEEE J. Solid State Circuits, 2018