Kazuki Monta

Orcid: 0000-0003-1590-4822

According to our database1, Kazuki Monta authored at least 8 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
On-Chip Evaluation of Voltage Drops and Fault Occurrence Induced by Si Backside EM Injection.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2024

2023
Silicon-correlated Simulation Methodology of EM Side-channel Leakage Analysis.
ACM J. Emerg. Technol. Comput. Syst., January, 2023

Characterization of Backside ESD Impacts on Integrated Circuits.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

On the Unpredictability of SPICE Simulations for Side-Channel Leakage Verification of Masked Cryptographic Circuits.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Testing Embedded Toggle Generation Through On-Chip IR-Drop Measurements.
IEEE Des. Test, 2022

2021
Multiphysics Simulation of EM Side-Channels from Silicon Backside with ML-based Auto-POI Identification.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

Testing Embedded Toggle Pattern Generation Through On-Chip IR Drop Monitoring.
Proceedings of the 26th IEEE European Test Symposium, 2021

2020
Fast and Comprehensive Simulation Methodology for Layout-Based Power-Noise Side-Channel Leakage Analysis.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2020


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