Nitin Pundir

Orcid: 0000-0001-5687-6237

According to our database1, Nitin Pundir authored at least 15 papers between 2017 and 2023.

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Bibliography

2023
Silicon-correlated Simulation Methodology of EM Side-channel Leakage Analysis.
ACM J. Emerg. Technol. Comput. Syst., January, 2023

SecHLS: Enabling Security Awareness in High-Level Synthesis.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
Power Side-Channel Leakage Assessment Framework at Register-Transfer Level.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Analyzing Security Vulnerabilities Induced by High-level Synthesis.
ACM J. Emerg. Technol. Comput. Syst., 2022

PQC-SEP: Power Side-channel Evaluation Platform for Post-Quantum Cryptography Algorithms.
IACR Cryptol. ePrint Arch., 2022

Secure Physical Design.
IACR Cryptol. ePrint Arch., 2022

LDTFI: Layout-aware Timing Fault-Injection Attack Assessment Against Differential Fault Analysis.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Security Properties Driven Pre-Silicon Laser Fault Injection Assessment.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

2021
What is All the FaaS About? - Remote Exploitation of FPGA-as-a-Service Platforms.
IACR Cryptol. ePrint Arch., 2021

Quantifiable Assurance: From IPs to Platforms.
IACR Cryptol. ePrint Arch., 2021

Secure High-Level Synthesis: Challenges and Solutions.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

2020
RanStop: A Hardware-assisted Runtime Crypto-Ransomware Detection Technique.
CoRR, 2020

2018
A Dynamic Area-Efficient Technique to Enhance ROPUFs Security Against Modeling Attacks.
Proceedings of the Computer and Network Security Essentials., 2018

2017
Novel technique to improve strength of weak arbiter PUF.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Analysis of a novel stage configurable ROPUF design.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017


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