Keh-Chung Wang
According to our database1,
Keh-Chung Wang
authored at least 34 papers
between 1991 and 2025.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2012, "For contributions to GaAs HBT integrated circuits for high speed data conversion and optical fiber communication systems".
Timeline
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Bibliography
2025
A Novel 3D Stacked Vertical-Channel High-Voltage Peripheral Transistor for Largely Scaled the WL Driver Circuit of 1000-layer 3D NAND Flash.
Proceedings of the IEEE International Memory Workshop, 2025
Utilizing 2T SONOS Cell Characteristics for L2/Euclidean Distance Computing - From Unit Cell to Array Operations.
Proceedings of the IEEE International Memory Workshop, 2025
2024
Bit-Cost-Scalable 3D DRAM Architecture and Unit Cell First Demonstrated with Integrated Gate-Around and Channel-Around IGZO FETs.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Proceedings of the IEEE International Reliability Physics Symposium, 2024
3D-NAND based Filtering Cube with High Resolution 2D Query and Tunable Feature Length for Computational SSD.
Proceedings of the IEEE International Memory Workshop, 2024
Multi-Gate Access Transistor to Minimize GIDL Leakage Current for Scaling 2-tier Stacked 4F<sup>2</sup> DRAM Below Equivalent 10nm Node.
Proceedings of the IEEE International Memory Workshop, 2024
Improved 3D DRAM Design Based on Gate-Controlled Thyristor Featuring Two Asymmetrical Horizontal WL's and Vertical BL for Better Cell Size Scaling and Array Selection.
Proceedings of the IEEE International Memory Workshop, 2024
2023
Chip Demonstration of a High-Density (43Gb) and High-Search-Bandwidth (300Gb/s) 3D NAND Based In-Memory Search Accelerator for Ternary Content Addressable Memory (TCAM) and Proximity Search of Hamming Distance.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
SLC and MLC In-Memory-Approximate-Search Solutions in Commercial 48-layer and 96-layer 3D-NAND Flash Memories.
Proceedings of the IEEE International Memory Workshop, 2023
A Simulation Study of Scaling Capability toward 10nm for the 3D Stackable Gate-Controlled Thyristor (GCT) DRAM Device.
Proceedings of the IEEE International Memory Workshop, 2023
2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
A 512Gb In-Memory-Computing 3D-NAND Flash Supporting Similar-Vector-Matching Operations on Edge-AI Devices.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
First Experimental Study of Floating-Body Cell Transient Reliability Characteristics of Both N- and P-Channel Vertical Gate-All-Around Devices with Split-Gate Structures.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
NOR Flash-based Multilevel In-Memory-Searching Architecture for Approximate Computing.
Proceedings of the IEEE International Memory Workshop, 2022
2021
Design of Computing-in-Memory (CIM) with Vertical Split-Gate Flash Memory for Deep Neural Network (DNN) Inference Accelerator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Robust Brain-Inspired Computing: On the Reliability of Spiking Neural Network Using Emerging Non-Volatile Synapses.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
First Study of P-Channel Vertical Split-Gate Flash Memory Device with Various Electron and Hole Injection Methods and Potential Future Possibility to Enable Functional Memory Circuits.
Proceedings of the IEEE International Memory Workshop, 2021
Write-In-Place Operation and It's Advantages to Upgrade the 3D AND-type Flash Memory Performances.
Proceedings of the IEEE International Memory Workshop, 2021
2020
Introduction of Non-Volatile Computing In Memory (nvCIM) by 3D NAND Flash for Inference Accelerator of Deep Neural Network (DNN) and the Read Disturb Reliability Evaluation : (Invited Paper).
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
Study of the Walk-Out Effect of Junction Breakdown Instability of the High-Voltage Depletion-Mode N-Channel MOSFET for NAND Flash Peripheral Device and an Efficient Layout Solution.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
2014
A 26-28-Gb/s Full-Rate Clock and Data Recovery Circuit With Embedded Equalizer in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
A 48-mW 18-Gb/s fully integrated CMOS optical receiver with photodetector and adaptive equalizer.
Proceedings of the Symposium on VLSI Circuits, 2014
2000
A 10-Gb/s high-isolation, 16×16 crosspoint switch implemented with AlGaAs/GaAs HBT's.
IEEE J. Solid State Circuits, 2000
1996
A packaged broad-band monolithic variable gain amplifier implemented in AlGaAs/GaAs HBT technology.
IEEE J. Solid State Circuits, 1996
1995
1993
GaAs-based heterojunction bipolar transistors for very high performance electronic circuits.
Proc. IEEE, 1993
1992
11.6-GHz 1:4 regenerating demultiplexer with bit-rotation control and 6.1-GHz auto-latching phase-aligner ICs using AlGaAs/GaAs HBT technology.
IEEE J. Solid State Circuits, December, 1992
IEEE J. Solid State Circuits, October, 1992
IEEE J. Solid State Circuits, October, 1992
IEEE J. Solid State Circuits, October, 1992
1991
IEEE J. Solid State Circuits, November, 1991
IEEE J. Solid State Circuits, October, 1991
IEEE J. Solid State Circuits, October, 1991