Oliver Diessel

According to our database, Oliver Diessel authored at least 63 papers between 1996 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2022

Leveraging FPGA Runtime Reconfigurability to Implement Multi-Hash-Chain Proof-of-Work.

Tong Wu, Oliver Diessel

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

On the Single Event Upset Vulnerability and Mitigation of Binarized Neural Networks on FPGAs.

Junning Fan, Oliver Diessel

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2019

Efficient Fine-grained Processor-logic Interactions on the Cache-coherent Zynq Platform.

Alexander Kroh, Oliver Diessel

ACM Trans. Reconfigurable Technol. Syst., 2019

Scheduling configuration memory error checks to improve the reliability of FPGA-based systems.

Nguyen Tran Huu Nguyen, Ediz Cetin, Oliver Diessel

IET Comput. Digit. Tech., 2019

Introduction to RAW 2019.

Fernanda Lima, Oliver Diessel

Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

2018

Fine-Grained Module-Based Error Recovery in FPGA-Based TMR Systems.

Zhuoran Zhao, Nguyen T. H. Nguyen, Dimitris Agiakatsikas, Ganghee Lee, Ediz Cetin, Oliver Diessel

ACM Trans. Reconfigurable Technol. Syst., 2018

Fault Recovery Time Analysis for Coarse-Grained Reconfigurable Architectures.

Ganghee Lee, Ediz Cetin, Oliver Diessel

ACM Trans. Embed. Comput. Syst., 2018

FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs.

Dimitris Agiakatsikas, Ediz Cetin, Oliver Diessel

IEEE Trans. Aerosp. Electron. Syst., 2018

Reconfiguration Control Networks for FPGA-based TMR systems with modular error recovery.

Nguyen T. H. Nguyen, Dimitris Agiakatsikas, Zhuoran Zhao, Tong Wu, Ediz Cetin, Oliver Diessel, Lingkan Gong

Microprocess. Microsystems, 2018

A Short-Transfer Model for Tightly-Coupled CPU-FPGA Platforms.

Alexander Kroh, Oliver Diessel

Proceedings of the International Conference on Field-Programmable Technology, 2018

From C to Fault-Tolerant FPGA-Based Systems.

Dimitris Agiakatsikas, Ganghee Lee, Thomas Mitchell, Ediz Cetin, Oliver Diessel

Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017

The First 25 Years of the FPL Conference: Significant Papers.

Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang

ACM Trans. Reconfigurable Technol. Syst., 2017

Service-Oriented Architecture on FPGA-Based MPSoC.

Chao Wang, Xi Li, Yunji Chen, Youhui Zhang, Oliver Diessel, Xuehai Zhou

IEEE Trans. Parallel Distributed Syst., 2017

Reliable SEU monitoring and recovery using a programmable configuration controller.

Lingkan Gong, Alexander Kroh, Dimitris Agiakatsikas, Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Scheduling Considerations for Voter Checking in TMR-MER Systems.

Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

TLegUp: A TMR Code Generation Tool for SRAM-Based FPGA Applications Using HLS.

Ganghee Lee, Dimitris Agiakatsikas, Tong Wu, Ediz Cetin, Oliver Diessel

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

Scheduling voter checks to detect configuration memory errors in FPGA-based TMR systems.

Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

2016

Fine-grained module-based error recovery in FPGA-based TMR systems.

Zhuoran Zhao, Dimitris Agiakatsikas, Nguyen T. H. Nguyen, Ediz Çetin, Oliver Diessel

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

Dynamic scheduling of voter checks in FPGA-based TMR systems.

Nguyen T. H. Nguyen, Dimitris Agiakatsikas, Ediz Çetin, Oliver Diessel

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

A Programmable Configuration Controller for fault-tolerant applications.

Lingkan Gong, Tong Wu, Nguyen T. H. Nguyen, Dimitris Agiakatsikas, Zhuoran Zhao, Ediz Cetin, Oliver Diessel

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs.

Dimitris Agiakatsikas, Ediz Çetin, Oliver Diessel

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Reconfiguration Control Networks for TMR Systems with Module-Based Recovery.

Dimitris Agiakatsikas, Nguyen T. H. Nguyen, Zhuoran Zhao, Tong Wu, Ediz Cetin, Oliver Diessel, Lingkan Gong

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015

A programmable multi-GNSS baseband receiver.

Vinh T. Tran, Nagaraj Channarayapatna Shivaramaiah, Oliver Diessel, Andrew G. Dempster

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Improving Fmax of FPGA circuits employing DPR to recover from configuration memory upsets.

Ediz Cetin, Oliver Diessel, Lingkan Gong

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Significant papers from the first 25 years of the FPL conference.

Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014

Simulation-based functional verification of dynamically reconfigurable systems.

Lingkan Gong, Oliver Diessel

ACM Trans. Embed. Comput. Syst., 2014

Reconfiguration network design for SEU recovery in FPGAs.

Ediz Cetin, Oliver Diessel, Lingkan Gong, Victor Lai

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

RTL Simulation of High Performance Dynamic Reconfiguration: A Video Processing Case Study.

Lingkan Gong, Oliver Diessel, Johny Paul, Walter Stechele

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Towards bounded error recovery time in FPGA-based TMR circuits using dynamic partial reconfiguration.

Ediz Cetin, Oliver Diessel, Lingkan Gong, Victor Lai

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012

Guest Editorial: Field-Programmable Technology.

Lesley Shannon, Oliver Diessel, Neil W. Bergmann

J. Signal Process. Syst., 2012

Functionally verifying state saving and restoration in dynamically reconfigurable systems.

Lingkan Gong, Oliver Diessel

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011

ReSim: A reusable library for RTL simulation of dynamic partial reconfiguration.

Lingkan Gong, Oliver Diessel

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

Modeling Dynamically Reconfigurable Systems for Simulation-Based Functional Verification.

Lingkan Gong, Oliver Diessel

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2010

Configuration Merging in Point-to-Point Networks for Module-Based FPGA Reconfiguration.

Shannon Koh, Oliver Diessel

ACM Trans. Reconfigurable Technol. Syst., 2010

FPGA-based video processing for a vision prosthesis.

Benjamin Kwek, Freddie Sunarso, Melissa Teoh, Arrian van Zal, Philip Preston, Oliver Diessel

Proceedings of the International Conference on Field-Programmable Technology, 2010

Towards Dilated Placement of Dynamic NoC Cores.

Branislav Hredzak, Oliver Diessel

Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010

2008

ACS: An Addressless Configuration Support for efficient partial reconfigurations.

Jenny Yi-Chun Kuo, Anderson Kuei-An Ku, Jingling Xue, Oliver Diessel, Usama Malik

Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration.

Shannon Koh, Oliver Diessel

Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

2007

Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices.

Shannon Koh, Oliver Diessel

Proceedings of the FPL 2007, 2007

2006

Communications infrastructure generation for modular FPGA reconfiguration.

Shannon Koh, Oliver Diessel

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

The Entropy of FPGA Reconfiguration.

Usama Malik, Oliver Diessel

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

COMMA: A Communications Methodology for Dynamic Module Reconfiguration in FPGAs.

Shannon Koh, Oliver Diessel

Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Enabling RTR for industry.

Oliver Diessel, Shannon Koh

Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006

COMMA: A Communications Methodology for Dynamic Module-based Reconfiguration of FPGAs.

Shannon Koh, Oliver Diessel

Proceedings of the ARCS 2006, 2006

Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass Delays.

Lih Wen Koh, Oliver Diessel

Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006

2005

A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs.

Usama Malik, Oliver Diessel

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

A Configuration System Architecture Supporting Bit-Stream Compression for FPGAs.

Marco Torre, Usama Malik, Oliver Diessel

Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2004

FPGA implementation of population-based ant colony optimization.

Bernd Scheuermann, Keith So, Michael Guntsch, Martin Middendorf, Oliver Diessel, Hossam A. ElGindy, Hartmut Schmeck

Appl. Soft Comput., 2004

On the placement and granularity of FPGA configurations.

Usama Malik, Oliver Diessel

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

2002

An FPGA Interpreter with Virtual Hardware Management.

Oliver Diessel, Usama Malik

Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

Resource-aware run-time elaboration of behavioural FPGA specifications.

Usama Malik, Keith So, Oliver Diessel

Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Population based ant colony optimization on FPGA.

Michael Guntsch, Martin Middendorf, Bernd Scheuermann, Oliver Diessel, Hossam A. ElGindy, Hartmut Schmeck, Keith So

Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Towards High-Level Specification, Synthesis, and Virtualization of Programmable Logic Designs (Research Note).

Oliver Diessel, Usama Malik, Keith So

Proceedings of the Euro-Par 2002, 2002

2001

On Dynamic Task Scheduling for EPGA-Based Systems.

Oliver Diessel, Hossam A. ElGindy

Int. J. Found. Comput. Sci., 2001

Chip-Based Reconfigurable Task Management.

Gordon J. Brebner, Oliver Diessel

Proceedings of the Field-Programmable Logic and Applications, 2001

2000

Configurable Architectures Workshop (RAW 2000).

Hossam A. ElGindy, Viktor K. Prasanna, Hartmut Schmeck, Oliver Diessel

Proceedings of the Parallel and Distributed Processing, 2000

Compiling Process Algebraic Descriptions into Reconfigurable Logic.

Oliver Diessel, George J. Milne

Proceedings of the Parallel and Distributed Processing, 2000

Behavioural Language Compilation with Virtual Hardware Management.

Oliver Diessel, George J. Milne

Proceedings of the Field-Programmable Logic and Applications, 2000

1999

A Web-Based Multiuser Operating System for Reconfiguarble Computing.

Oliver Diessel, David A. Kearney, Grant B. Wigley

Proceedings of the Parallel and Distributed Processing, 1999

1998

Partial Rearrangements of Space-Shared FPGAs.

Oliver Diessel, Hossam A. ElGindy

Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998

Partial FPGA Rearrangement by Local Repacking (Abstract).

Oliver Diessel, Hossam A. ElGindy

Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998

1997

Run-time compaction of FPGA designs.

Oliver Diessel, Hossam A. ElGindy

Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

1996

Optimal Algorithms for Constrained Reconfigurable Meshes.

Bryan Beresford-Smith, Oliver Diessel, Hossam A. ElGindy

J. Parallel Distributed Comput., 1996