Licheng Guo

Orcid: 0000-0002-0705-9510

According to our database1, Licheng Guo authored at least 23 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Bibliography

2023
CHIP-KNNv2: A Configurable and High-Performance K-Nearest Neighbors Accelerator on HBM-based FPGAs.
ACM Trans. Reconfigurable Technol. Syst., December, 2023

RapidStream 2.0: Automated Parallel Implementation of Latency-Insensitive FPGA Designs Through Partial Reconfiguration.
ACM Trans. Reconfigurable Technol. Syst., December, 2023

TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design.
ACM Trans. Reconfigurable Technol. Syst., December, 2023

SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs.
ACM Trans. Reconfigurable Technol. Syst., June, 2023

FlexCNN: An End-to-end Framework for Composing CNN Accelerators on FPGA.
ACM Trans. Reconfigurable Technol. Syst., June, 2023

TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs.
IEEE Trans. Emerg. Top. Comput., 2023

Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022
Co-optimizing High-Level Synthesis and Physical Design for Rapid Timing Closure of Large-Scale FPGA Designs
PhD thesis, 2022

OverGen: Improving FPGA Usability through Domain-specific Overlay Generation.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

RapidStream: Parallel Physical Implementation of FPGA HLS Designs.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

Accelerating SSSP for Power-Law Graphs.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

Serpens: a high bandwidth memory based accelerator for general-purpose sparse matrix-vector multiplication.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Extending High-Level Synthesis for Task-Parallel Programs.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

AutoSA: A Polyhedral Compiler for High-Performance Systolic Arrays on FPGA.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

FANS: FPGA-Accelerated Near-Storage Sorting.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

Extending High-Level Synthesis for Task-Parallel Programs.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

2020
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization.
CoRR, 2020

Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2019
Hardware Acceleration of Long Read Pairwise Overlapping in Genome Sequencing: A Race Between FPGA and GPU.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for Genome Sequencing.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for DNA Sequencing.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018


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