Jerónimo Castrillón

According to our database, Jerónimo Castrillón authored at least 125 papers between 2005 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach.

Christian Pilato, Subhadeep Banik, Jakub Beránek, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Radim Cmar, Serena Curzel, Fabrizio Ferrandi, Karl F. A. Friebel, Antonella Galizia, Matteo Grasso, Paulo Silva, Jan Martinovic, Gianluca Palermo, Michele Paolino, Andrea Parodi, Antonio Parodi, Fabio Pintus, Raphael Polig, David Poulet, Francesco Regazzoni, Burkhard Ringlein, Roberto Rocco, Katerina Slaninová, Tom Slooff, Stephanie Soldavini, Felix Suchert, Mattia Tibaldi, Beat Weiss, Christoph Hagleitner

CoRR, 2024

The Landscape of Compute-near-memory and Compute-in-memory: A Research and Commercial Overview.

Asif Ali Khan, João Paulo C. de Lima, Hamid Farzaneh, Jerónimo Castrillón

CoRR, 2024

Full-Stack Optimization for CAM-Only DNN Inference.

João Paulo C. de Lima, Asif Ali Khan, Luigi Carro, Jerónimo Castrillón

CoRR, 2024

C4CAM: A Compiler for CAM-based In-memory Accelerators.

Hamid Farzaneh, João Paulo Cardoso de Lima, Mengyuan Li, Asif Ali Khan, Xiaobo Sharon Hu, Jerónimo Castrillón

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

High-performance Deterministic Concurrency Using Lingua Franca.

Christian Menard, Marten Lohstroh, Soroush Bateni, Matthew Chorlian, Arthur Deng, Peter Donovan, Clément Fournier, Shaokai Lin, Felix Suchert, Tassilo Tanneberger, Hokeun Kim, Jerónimo Castrillón, Edward A. Lee

ACM Trans. Archit. Code Optim., December, 2023

DownShift: Tuning Shift Reduction With Reliability for Racetrack Memories.

Asif Ali Khan, Sébastien Ollivier, Fazal Hameed, Jerónimo Castrillón, Alex K. Jones

IEEE Trans. Computers, September, 2023

Automatic Creation of High-bandwidth Memory Architectures from Domain-specific Languages: The Case of Computational Fluid Dynamics.

Stephanie Soldavini, Karl F. A. Friebel, Mattia Tibaldi, Gerald Hempel, Jerónimo Castrillón, Christian Pilato

ACM Trans. Reconfigurable Technol. Syst., June, 2023

ROLLED: Racetrack Memory Optimized Linear Layout and Efficient Decomposition of Decision Trees.

Christian Hakert, Asif Ali Khan, Kuan-Hsun Chen, Fazal Hameed, Jerónimo Castrillón, Jian-Jia Chen

IEEE Trans. Computers, May, 2023

ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs (Artifact).

Felix Suchert, Lisza Zeidler, Jerónimo Castrillón, Sebastian Ertel

Dagstuhl Artifacts Ser., 2023

HElium: A Language and Compiler for Fully Homomorphic Encryption with Support for Proxy Re-Encryption.

Mirko Günther, Lars Schütze, Kilian Becher, Thorsten Strufe, Jerónimo Castrillón

CoRR, 2023

CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms.

Asif Ali Khan, Hamid Farzaneh, Karl F. A. Friebel, Lorenzo Chelini, Jerónimo Castrillón

CoRR, 2023

Design Space Exploration for CNN Offloading to FPGAs at the Edge.

Guilherme Korol, Michael Guilherme Jordan, Mateus Beck Rutzig, Jerónimo Castrillón, Antonio Carlos Schneider Beck

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

Compression-Aware and Performance-Efficient Insertion Policies for Long-Lasting Hybrid LLCs.

Carlos Escuin, Asif Ali Khan, Pablo Ibáñez, Teresa Monreal, Jerónimo Castrillón, Víctor Viñals

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

base2: An IR for Binary Numeral Types.

Karl F. A. Friebel, Jiahong Bi, Jerónimo Castrillón

Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2023

ConDRust: Scalable Deterministic Concurrency from Verifiable Rust Programs.

Felix Suchert, Lisza Zeidler, Jerónimo Castrillón, Sebastian Ertel

Proceedings of the 37th European Conference on Object-Oriented Programming, 2023

Pruning and Early-Exit Co-Optimization for CNN Acceleration on FPGAs.

Guilherme Korol, Michael Guilherme Jordan, Mateus Beck Rutzig, Jerónimo Castrillón, Antonio Carlos Schneider Beck

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Towards Virtual Machine Support for Contextual Role-Oriented Programming Languages.

Lars Schütze, Jerónimo Castrillón

Proceedings of the 15th ACM International Workshop on Context-Oriented Programming and Advanced Modularity, 2023

Special Session - Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications.

Jörg Henkel, Lokesh Siddhu, Lars Bauer, Jürgen Teich, Stefan Wildermann, Mehdi B. Tahoori, Mahta Mayahinia, Jerónimo Castrillón, Asif Ali Khan, Hamid Farzaneh, João Paulo C. de Lima, Jian-Jia Chen, Christian Hakert, Kuan-Hsun Chen, Chia-Lin Yang, Hsiang-Yun Cheng

Proceedings of the International Conference on Compilers, 2023

2022

Brain-inspired Cognition in Next-generation Racetrack Memories.

Asif Ali Khan, Sébastien Ollivier, Stephen Longofono, Gerald Hempel, Jerónimo Castrillón, Alex K. Jones

ACM Trans. Embed. Comput. Syst., November, 2022

ALPHA: A Novel Algorithm-Hardware Co-Design for Accelerating DNA Seed Location Filtering.

Fazal Hameed, Asif Ali Khan, Jerónimo Castrillón

IEEE Trans. Emerg. Top. Comput., 2022

OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory.

Adam Siemieniuk, Lorenzo Chelini, Asif Ali Khan, Jerónimo Castrillón, Andi Drebes, Henk Corporaal, Tobias Grosser, Martin Kong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

BlendCache: An Energy and Area Efficient Racetrack Last-Level-Cache Architecture.

Fazal Hameed, Jerónimo Castrillón

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

mpsym: Improving Design-Space Exploration of Clustered Manycores With Arbitrary Topologies.

Andres Goens, Timo Nicolai, Jerónimo Castrillón

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Energy-Efficient Instruction Delivery in Embedded Systems With Domain Wall Memory.

Joonas Multanen, Kari Hepola, Asif Ali Khan, Jerónimo Castrillón, Pekka Jääskeläinen

IEEE Trans. Computers, 2022

Model-based autotuning of discretization methods in numerical simulations of partial differential equations.

Nesrine Khouzami, Friedrich Michel, Pietro Incardona, Jerónimo Castrillón, Ivo F. Sbalzarini

J. Comput. Sci., 2022

mAPN: Modeling, Analysis, and Exploration of Algorithmic and Parallelism Adaptivity.

Hasna Bouraoui, Chadlia Jerad, Omar Romdhani, Jerónimo Castrillón

CoRR, 2022

DNA Pre-Alignment Filter Using Processing Near Racetrack Memory.

Fazal Hameed, Asif Ali Khan, Sébastien Ollivier, Alex K. Jones, Jerónimo Castrillón

IEEE Comput. Archit. Lett., 2022

Shisha: Online Scheduling of CNN Pipelines on Heterogeneous Architectures.

Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs

Proceedings of the Parallel Processing and Applied Mathematics, 2022

Parameterizable mobile workloads for adaptable base station optimizations.

Julian Robledo, Jerónimo Castrillón

Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022

HyCSim: A rapid design space exploration tool for emerging hybrid last-level caches.

Carlos Escuin, Asif Ali Khan, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, Jerónimo Castrillón

Proceedings of the DroneSE and RAPIDO '22: System Engineering for constrained embedded systems, Budapest Hungary, January 17, 2022

Guard the Cache: Dispatch Optimization in a Contextual Role-oriented Language.

Lars Schütze, Cornelius Kummer, Jerónimo Castrillón

Proceedings of the COP@ECOOP 2022: International Workshop on Context-Oriented Programming and Advanced Modularity (collocated with ECOOP), 2022

STAMP-Rust: Language and Performance Comparison to C on Transactional Benchmarks.

Felix Suchert, Jerónimo Castrillón

Proceedings of the Benchmarking, Measuring, and Optimizing, 2022

2021

Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing in Wireless Networks.

Robert Khasanov, Julian Robledo, Christian Menard, Andrés Goens, Jerónimo Castrillón

ACM Trans. Embed. Comput. Syst., 2021

Improving the Performance of Block-based DRAM Caches Via Tag-Data Decoupling.

Fazal Hameed, Asif Ali Khan, Jerónimo Castrillón

IEEE Trans. Computers, 2021

A Reinforcement Learning Environment for Polyhedral Optimizations.

Alexander Brauckmann, Andrés Goens, Jerónimo Castrillón

CoRR, 2021

Embeddings of Task Mappings to Multicore Systems.

Andrés Goens, Jerónimo Castrillón

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021

The OpenPME Problem Solving Environment for Numerical Simulations.

Nesrine Khouzami, Lars Schütze, Pietro Incardona, Landfried Kraatz, Tina Subic, Jerónimo Castrillón, Ivo F. Sbalzarini

Proceedings of the Computational Science - ICCS 2021, 2021

Mocasin - Rapid Prototyping of Rapid Prototyping Tools: A Framework for Exploring New Approaches in Mapping Software to Heterogeneous Multi-cores.

Christian Menard, Andrés Goens, Gerald Hempel, Robert Khasanov, Julian Robledo, Felix Teweleitt, Jerónimo Castrillón

Proceedings of the DroneSE and RAPIDO '21: Methods and Tools, 2021

Towards Adaptive Multi-Alternative Process Network.

Hasna Bouraoui, Chadlia Jerad, Jerónimo Castrillón

Proceedings of the 12th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and 10th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2021

EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms.

Christian Pilato, Stanislav Böhm, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Vojtech Cima, Radim Cmar, Dionysios Diamantopoulos, Fabrizio Ferrandi, Jan Martinovic, Gianluca Palermo, Michele Paolino, Antonio Parodi, Lorenzo Pittaluga, Daniel Raho, Francesco Regazzoni, Katerina Slaninová, Christoph Hagleitner

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

BLOwing Trees to the Ground: Layout Optimization of Decision Trees on Racetrack Memory.

Christian Hakert, Asif Ali Khan, Kuan-Hsun Chen, Fazal Hameed, Jerónimo Castrillón, Jian-Jia Chen

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

From Domain-Specific Languages to Memory-Optimized Accelerators for Fluid Dynamics.

Karl F. A. Friebel, Stephanie Soldavini, Gerald Hempel, Christian Pilato, Jerónimo Castrillón

Proceedings of the IEEE International Conference on Cluster Computing, 2021

An online guided tuning approach to run CNN pipelines on edge devices.

Pirah Noor Soomro, Mustafa Abduljabbar, Jerónimo Castrillón, Miquel Pericàs

Proceedings of the CF '21: Computing Frontiers Conference, 2021

PolyGym: Polyhedral Optimizations as an Environment for Reinforcement Learning.

Alexander Brauckmann, Andrés Goens, Jerónimo Castrillón

Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021

2020

Optimizing Tensor Contractions for Embedded Devices with Racetrack and DRAM Memories.

Asif Ali Khan, Norman A. Rink, Fazal Hameed, Jerónimo Castrillón

ACM Trans. Embed. Comput. Syst., 2020

Polyhedral Compilation for Racetrack Memories.

Asif Ali Khan, Hauke Mewes, Tobias Grosser, Torsten Hoefler, Jerónimo Castrillón

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

ShiftsReduce: Minimizing Shifts in Racetrack Memory 4.0.

Asif Ali Khan, Fazal Hameed, Robin Bläsing, Stuart S. P. Parkin, Jerónimo Castrillón

ACM Trans. Archit. Code Optim., 2020

Magnetic Racetrack Memory: From Physics to the Cusp of Applications Within a Decade.

Robin Bläsing, Asif Ali Khan, Panagiotis Ch. Filippou, Chirag Garg, Fazal Hameed, Jerónimo Castrillón, Stuart S. P. Parkin

Proc. IEEE, 2020

The gem5 Simulator: Version 20.0+.

Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian

CoRR, 2020

Efficient dispatch of multi-object polymorphic call sites in contextual role-oriented programming languages.

Lars Schütze, Jerónimo Castrillón

Proceedings of the MPLR '20: 17th International Conference on Managed Programming Languages and Runtimes, 2020

Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach.

Robert Wittig, Andrés Goens, Christian Menard, Emil Matús, Gerhard P. Fettweis, Jerónimo Castrillón

Proceedings of the 27th International Conference on Telecommunications, 2020

A Language for Deterministic Coordination Across Multiple Timelines.

Marten Lohstroh, Christian Menard, Alexander Schulz-Rosengarten, Matthew Weber, Jerónimo Castrillón, Edward A. Lee

Proceedings of the Forum for Specification and Design Languages, 2020

ComPy-Learn: A toolbox for exploring machine learning representations for compilers.

Alexander Brauckmann, Andrés Goens, Jerónimo Castrillón

Proceedings of the Forum for Specification and Design Languages, 2020

Achieving Determinism in Adaptive AUTOSAR.

Christian Menard, Andrés Goens, Marten Lohstroh, Jerónimo Castrillón

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Energy-efficient Runtime Resource Management for Adaptable Multi-application Mapping.

Robert Khasanov, Jerónimo Castrillón

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Generalized Data Placement Strategies for Racetrack Memories.

Asif Ali Khan, Andrés Goens, Fazal Hameed, Jerónimo Castrillón

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Compiler-based graph representations for deep learning models of code.

Alexander Brauckmann, Andrés Goens, Sebastian Ertel, Jerónimo Castrillón

Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020

2019

A Novel Hybrid DRAM/STT-RAM Last-Level-Cache Architecture for Performance, Energy, and Endurance Enhancement.

Fazal Hameed, Jerónimo Castrillón

IEEE Trans. Very Large Scale Integr. Syst., 2019

Architecture and Advanced Electronics Pathways Toward Highly Adaptive Energy- Efficient Computing.

Gerhard P. Fettweis, Meik Dorpinghaus, Jerónimo Castrillón, Akash Kumar, Christel Baier, Karlheinz Bock, Frank Ellinger, Andreas Fery, Frank H. P. Fitzek, Hermann Härtig, Kambiz Jamshidi, Thomas Kissinger, Wolfgang Lehner, Michael Mertig, Wolfgang E. Nagel, Giang T. Nguyen, Dirk Plettemeier, Michael Schröter, Thorsten Strufe

Proc. IEEE, 2019

Category-Theoretic Foundations of "STCLang: State Thread Composition as a Foundation for Monadic Dataflow Parallelism".

Sebastian Ertel, Justus Adam, Norman A. Rink, Andrés Goens, Jerónimo Castrillón

CoRR, 2019

RTSim: A Cycle-Accurate Simulator for Racetrack Memories.

Asif Ali Khan, Fazal Hameed, Robin Bläsing, Stuart S. P. Parkin, Jerónimo Castrillón

IEEE Comput. Archit. Lett., 2019

Efficient late binding of dynamic function compositions.

Lars Schütze, Jerónimo Castrillón

Proceedings of the 12th ACM SIGPLAN International Conference on Software Language Engineering, 2019

On Compact Mappings for Multicore Systems.

Andrés Goens, Christian Menard, Jerónimo Castrillón

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

TeIL: a type-safe imperative tensor intermediate language.

Norman A. Rink, Jerónimo Castrillón

Proceedings of the 6th ACM SIGPLAN International Workshop on Libraries, 2019

A case study on machine learning for synthesizing benchmarks.

Andrés Goens, Alexander Brauckmann, Sebastian Ertel, Chris Cummins, Hugh Leather, Jerónimo Castrillón

Proceedings of the 3rd ACM SIGPLAN International Workshop on Machine Learning and Programming Languages, 2019

Optimizing tensor contractions for embedded devices with racetrack memory scratch-pads.

Asif Ali Khan, Norman A. Rink, Fazal Hameed, Jerónimo Castrillón

Proceedings of the 20th ACM SIGPLAN/SIGBED International Conference on Languages, 2019

SHRIMP: Efficient Instruction Delivery with Domain Wall Memory.

Joonas Multanen, Pekka Jääskeläinen, Asif Ali Khan, Fazal Hameed, Jerónimo Castrillón

Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

STCLang: state thread composition as a foundation for monadic dataflow parallelism.

Sebastian Ertel, Justus Adam, Norman A. Rink, Andrés Goens, Jerónimo Castrillón

Proceedings of the 12th ACM SIGPLAN International Symposium on Haskell, 2019

RecordFlux: Formal Message Specification and Generation of Verifiable Binary Parsers.

Tobias Reiher, Alexander Senier, Jerónimo Castrillón, Thorsten Strufe

Proceedings of the Formal Aspects of Component Software - 16th International Conference, 2019

Reactors: A Deterministic Model for Composable Reactive Systems.

Marten Lohstroh, Íñigo Íncer Romeo, Andrés Goens, Patricia Derler, Jerónimo Castrillón, Edward A. Lee, Alberto L. Sangiovanni-Vincentelli

Proceedings of the Cyber Physical Systems. Model-Based Design - 9th International Workshop, 2019

2018

Performance and Energy-Efficient Design of STT-RAM Last-Level Cache.

Fazal Hameed, Asif Ali Khan, Jerónimo Castrillón

IEEE Trans. Very Large Scale Integr. Syst., 2018

A Domain-Specific Language and Editor for Parallel Particle Methods.

Sven Karol, Tobias Nett, Jerónimo Castrillón, Ivo F. Sbalzarini

ACM Trans. Math. Softw., 2018

A Hardware/Software Stack for Heterogeneous Systems.

Jerónimo Castrillón, Matthias Lieber, Sascha Klüppelholz, Marcus Völp, Nils Asmussen, Uwe Aßmann, Franz Baader, Christel Baier, Gerhard P. Fettweis, Jochen Fröhlich, Andrés Goens, Sebastian Haas, Dirk Habich, Hermann Härtig, Mattis Hasler, Immo Huismann, Tomas Karnagel, Sven Karol, Akash Kumar, Wolfgang Lehner, Linda Leuschner, Siqi Ling, Steffen Märcker, Christian Menard, Johannes Mey, Wolfgang E. Nagel, Benedikt Nöthen, Rafael Peñaloza, Michael Raitza, Jörg Stiller, Annett Ungethüm, Axel Voigt, Sascha Wunderlich

IEEE Trans. Multi Scale Comput. Syst., 2018

NVMain Extension for Multi-Level Cache Systems.

Asif Ali Khan, Fazal Hameed, Jerónimo Castrillón

Proceedings of the RAPIDO 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2018

Supporting Fine-grained Dataflow Parallelism in Big Data Systems.

Sebastian Ertel, Justus Adam, Jerónimo Castrillón

Proceedings of the 9th International Workshop on Programming Models and Applications for Multicores and Manycores, 2018

On the Representation of Mappings to Multicores.

Andres Goens, Christian Menard, Jerónimo Castrillón

Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018

Implicit Data-Parallelism in Kahn Process Networks: Bridging the MacQueen Gap.

Robert Khasanov, Andrés Goens, Jerónimo Castrillón

Proceedings of the 9th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and 7th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2018

Meta-programming for cross-domain tensor optimizations.

Adilla Susungi, Norman A. Rink, Albert Cohen, Jerónimo Castrillón, Claude Tadonki

Proceedings of the 17th ACM SIGPLAN International Conference on Generative Programming: Concepts and Experiences, 2018

CFDlang: High-level code generation for high-order methods in fluid dynamics.

Norman A. Rink, Adilla Susungi, Jerónimo Castrillón, Jörg Stiller, Claude Tadonki

Proceedings of the Real World Domain Specific Languages Workshop, 2018

Compiling for concise code and efficient I/O.

Sebastian Ertel, Andrés Goens, Justus Adam, Jerónimo Castrillón

Proceedings of the 27th International Conference on Compiler Construction, 2018

2017

MAPS: A Software Development Environment for Embedded Multicore Applications.

Rainer Leupers, Miguel Angel Aguilar, Juan Fernando Eusse, Jerónimo Castrillón, Weihua Sheng

Proceedings of the Handbook of Hardware/Software Codesign., 2017

Symmetry in Software Synthesis.

Andrés Goens, Sergio Siccha, Jerónimo Castrillón

ACM Trans. Archit. Code Optim., 2017

Wildly Heterogeneous Post-CMOS Technologies Meet Software (Dagstuhl Seminar 17061).

Jerónimo Castrillón Mazo, Tei-Wei Kuo, Heike E. Riel, Matthias Lieber

Dagstuhl Reports, 2017

Robust Mapping of Process Networks to Many-Core Systems using Bio-Inspired Design Centering.

Gerald Hempel, Andrés Goens, Jerónimo Castrillón, Josefine Asmus, Ivo F. Sbalzarini

Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, 2017

TETRiS: a Multi-Application Run-Time System for Predictable Execution of Static Mappings.

Andrés Goens, Robert Khasanov, Jerónimo Castrillón, Marcus Hähnel, Till Smejkal, Hermann Härtig

Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, 2017

System simulation with gem5 and SystemC: The keystone for full interoperability.

Christian Menard, Jerónimo Castrillón, Matthias Jung, Norbert Wehn

Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

Analyzing State-of-the-Art Role-based Programming Languages.

Lars Schütze, Jerónimo Castrillón

Proceedings of the Companion to the first International Conference on the Art, 2017

Efficient STT-RAM last-level-cache architecture to replace DRAM cache.

Fazal Hameed, Christian Menard, Jerónimo Castrillón

Proceedings of the International Symposium on Memory Systems, 2017

Application interference analysis: Towards energy-efficient workload management on heterogeneous micro-server architectures.

Markus Hähnel, Frehiwot Melak Arega, Waltenegus Dargie, Robert Khasanov, Jerónimo Castrillón

Proceedings of the 2017 IEEE Conference on Computer Communications Workshops, 2017

Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY): Preface.

Johanna Sepúlveda, Vania Marangozova-Martin, Jerónimo Castrillón

Proceedings of the International Conference on Computational Science, 2017

Towards compositional and generative tensor optimizations.

Adilla Susungi, Norman A. Rink, Jerónimo Castrillón, Immo Huismann, Albert Cohen, Claude Tadonki, Jörg Stiller, Jochen Fröhlich

Proceedings of the 16th ACM SIGPLAN International Conference on Generative Programming: Concepts and Experiences, 2017

Rethinking on-chip DRAM cache for simultaneous performance and energy optimization.

Fazal Hameed, Jerónimo Castrillón

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Trading Fault Tolerance for Performance in AN Encoding.

Norman A. Rink, Jerónimo Castrillón

Proceedings of the Computing Frontiers Conference, 2017

Multi-grained performance estimation for MPSoC compilers: work-in-progress.

Miguel Angel Aguilar, Abhishek Aggarwal, Awaid Shaheen, Rainer Leupers, Gerd Ascheid, Jerónimo Castrillón, Liam Fitzpatrick

Proceedings of the 2017 International Conference on Compilers, 2017

Extending a Compiler Backend for Complete Memory Error Detection.

Norman A. Rink, Jerónimo Castrillón

Proceedings of the Automotive - Safety & Security 2017, 2017

2016

Guest Editorial: Special Issue on Virtual Prototyping of Parallel and Embedded Systems (ViPES).

Jerónimo Castrillón Mazo, Cristina Silvano

ACM Trans. Embed. Comput. Syst., 2016

An optimal allocation of memory buffers for complex multicore platforms.

Andres Goens, Jerónimo Castrillón, Maximilian Odendahl, Rainer Leupers

J. Syst. Archit., 2016

Compile- and run-time approaches for the selection of efficient data structures for dynamic graph analysis.

Benjamin Schiller, Clemens Deusser, Jerónimo Castrillón, Thorsten Strufe

Appl. Netw. Sci., 2016

High-level NoC model for MPSoC compilers.

Christian Menard, Andres Goens, Jerónimo Castrillón

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Why Comparing System-Level MPSoC Mapping Approaches is Difficult: A Case Study.

Andres Goens, Robert Khasanov, Jerónimo Castrillón, Simon Polstra, Andy D. Pimentel

Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Fault tolerance with aspects: a feasibility study.

Sven Karol, Norman A. Rink, Bálint Gyapjas, Jerónimo Castrillón

Proceedings of the 15th International Conference on Modularity, 2016

2015

GCC-Plugin for Automated Accelerator Generation and Integration on Hybrid FPGA-SoCs.

Markus Vogt, Gerald Hempel, Jerónimo Castrillón, Christian Hochberger

CoRR, 2015

Efficient Data Structures for Dynamic Graph Analysis.

Benjamin Schiller, Jerónimo Castrillón, Thorsten Strufe

Proceedings of the 11th International Conference on Signal-Image Technology & Internet-Based Systems, 2015

ViPES 2015 - Preface.

Diana Göhringer, Michael Hübner, Jerónimo Castrillón, Cristina Silvano

Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

Compiling for Resilience: the Performance Gap.

Norman A. Rink, Dmitrii Kuvaiskii, Jerónimo Castrillón, Christof Fetzer

Proceedings of the Parallel Computing: On the Road to Exascale, 2015

Analysis of Process Traces for Mapping Dynamic KPN Applications to MPSoCs.

Andrés Goens, Jerónimo Castrillón

Proceedings of the System Level Design from HW/SW to Memory for Embedded Systems, 2015

Multi/many-core programming: where are we standing?

Jerónimo Castrillón, Lothar Thiele, Lars Schor, Weihua Sheng, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Angela Pohl, Ralph Jessenberger, Victor Reyes, Rainer Leupers

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Automatic detection of concurrency bugs through event ordering constraints.

Luis Gabriel Murillo, Simon Wawroschek, Jerónimo Castrillón, Rainer Leupers, Gerd Ascheid

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Software Compilation Techniques for MPSoCs.

Rainer Leupers, Weihua Sheng, Jerónimo Castrillón

Proceedings of the Handbook of Signal Processing Systems, 2013

Programming heterogeneous MPSoCs: tool flows to close the software productivity gap.

Jerónimo Castrillón Mazo

PhD thesis, 2013

MAPS: Mapping Concurrent Dataflow Applications to Heterogeneous MPSoCs.

Jerónimo Castrillón, Rainer Leupers, Gerd Ascheid

IEEE Trans. Ind. Informatics, 2013

Efficient Implementation of Application-Aware Spinlock Control in MPSoCs.

Diandian Zhang, Li Lu, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout

Int. J. Embed. Real Time Commun. Syst., 2013

Split-cost communication model for improved MPSoC application mapping.

Maximilian Odendahl, Jerónimo Castrillón, Vitaliy Volevach, Rainer Leupers, Gerd Ascheid

Proceedings of the 2013 International Symposium on System on Chip, 2013

2012

Application-aware spinlock control using a hardware scheduler in MPSoC platforms.

Diandian Zhang, Li Lu, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout

Proceedings of the 2012 International Symposium on System on Chip, 2012

Communication-aware mapping of KPN applications onto heterogeneous MPSoCs.

Jerónimo Castrillón, Andreas Tretter, Rainer Leupers, Gerd Ascheid

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis.

Diandian Zhang, Han Zhang, Jerónimo Castrillón, Torsten Kempf, Bart Vanthournout, Gerd Ascheid, Rainer Leupers

Int. J. Embed. Real Time Commun. Syst., 2011

Trends in embedded software synthesis.

Jerónimo Castrillón, Weihua Sheng, Rainer Leupers

Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

2010

Optimized communication architecture of MPSoCs with a hardware scheduler: A system view.

Diandian Zhang, Han Zhang, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout

Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

Trace-based KPN composability analysis for mapping simultaneous applications to MPSoC platforms.

Jerónimo Castrillón, Ricardo Velasquez, Anastasia Stulova, Weihua Sheng, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Proceedings of the Design, Automation and Test in Europe, 2010

MPSoC programming using the MAPS compiler.

Rainer Leupers, Jerónimo Castrillón

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Software Compilation Techniques for MPSoCs.

Rainer Leupers, Weihua Sheng, Jerónimo Castrillón

Proceedings of the Handbook of Signal Processing Systems, 2010

2009

Task management in MPSoCs: An ASIP approach.

Jerónimo Castrillón, Diandian Zhang, Torsten Kempf, Bart Vanthournout, Rainer Leupers, Gerd Ascheid

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

A high-level virtual platform for early MPSoC software development.

Jianjiang Ceng, Weihua Sheng, Jerónimo Castrillón, Anastasia Stulova, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

2008

MAPS: an integrated framework for MPSoC application parallelization.

Jianjiang Ceng, Jerónimo Castrillón, Weihua Sheng, Hanno Scharwächter, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tsuyoshi Isshiki, Hiroaki Kunieda

Proceedings of the 45th Design Automation Conference, 2008

2005

Reinforcement Learning with Kohonen-based State Aggregation for Obstacle Avoidance of a Mobile Robot.

Jerónimo Castrillón, Jorge A. Peña

Proceedings of the Memorias del Congreso Internacional de Inteligencia Computacional, 2005