Mattis Hasler

Orcid: 0000-0001-7979-674X

According to our database¹, Mattis Hasler authored at least 29 papers between 2016 and 2026.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

Legend:

Book In proceedings Article PhD thesis Dataset Other

Links

On csauthors.net:

Bibliography

2026

Reinforced Logic-Based Distributed Routing within Isolated Secure Zones.

[BibT_eX]

[DOI]

Proceedings of the 31st Asia and South Pacific Design Automation Conference, 2026

2025

A Secure-by-Design Hardware/Operating System as a Substrate for Trustworthy Computing.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., October, 2025

A Multidimensional Hardware Trojan Design Platform to Enhance Hardware Security.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., February, 2025

RoadRunner: A Modularized Design and Tool Manager for Hardware Projects.

[BibT_eX]

[DOI]

Mattis Hasler

Sebastian Haas

Proceedings of the 38th IEEE International System-on-Chip Conference, 2025

An Architectural Approach for the Secure Integration of Hardware Accelerators into a Trustworthy MPSoC Platform.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2025

A Survey on Recent Developments in SCOAP-based Hardware Trojan Detection Strategies.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Attack on Memory Encryption in MPSoCs using HT-infected AES core.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025

Secure AI Runtime System Based on the M3 Platform.

[BibT_eX]

[DOI]

Proceedings of the 59th Asilomar Conference on Signals, 2025

2024

Trustworthy Silicon: An MPSoC for a Secure Operating System.

[BibT_eX]

[DOI]

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

Hardware Attack Models in Tiled Chip Multi-Core Processors: A Survey.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2024

2023

Towards efficient resource allocation for embedded systems.

[BibT_eX]

[DOI]

Mattis Hasler

PhD thesis, 2023

Crosstalk-Based Hardware Trojan In Low Power Designs.

[BibT_eX]

[DOI]

Yogesh Verma

Mattis Hasler

Proceedings of the 20th International SoC Design Conference, 2023

Trust-minimized Integration of Third-Party Intellectual Property Cores.

[BibT_eX]

[DOI]

Friedrich Pauls

Sebastian Haas

Mattis Hasler

Proceedings of the 20th International SoC Design Conference, 2023

Mitigating Message Passing Interference in Trusted Embedded Platforms.

[BibT_eX]

[DOI]

Mattis Hasler

Sebastian Haas

Proceedings of the 20th International SoC Design Conference, 2023

Implicit Hardware Trojan: Principles and Enabling Methods.

[BibT_eX]

[DOI]

Nilanjana Das

Mattis Hasler

Sebastian Haas

Proceedings of the 20th International SoC Design Conference, 2023

Hiding from Hardware Trojan Detectors by Avoiding Rare Events.

[BibT_eX]

[DOI]

Mattis Hasler

Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022

A Random Linear Network Coding Platform MPSoC Designed in 22nm FDSOI.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Trustworthy Computing for O-RAN: Security in a Latency-Sensitive Environment.

[BibT_eX]

[DOI]

Proceedings of the IEEE Globecom 2022 Workshops, 2022

2020

Balancing Dynamic Scheduling Overhead to Maximize SDF Performance.

[BibT_eX]

[DOI]

Proceedings of the 2nd 6G Wireless Summit, 2020

2019

Probabilistic Models for Off-Line Arbiters in Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

5G-and-Beyond Scalable Machines.

[BibT_eX]

[DOI]

Stefan A. Damjancevic

Seungseok Nam

Sebastian Haas

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

A Hybrid Execution Approach to Improve the Performance of Dataflow Applications.

[BibT_eX]

[DOI]

Proceedings of the 2019 International SoC Design Conference, 2019

Queue Based Memory Management Unit for Heterogeneous MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Statistical Access Interval Prediction for Tightly Coupled Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019

A Low-Power Scalable Signal Processing Chip Platform for 5G and Beyond - Kachel.

[BibT_eX]

[DOI]

Stefan A. Damjancevic

Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

2018

A Hardware/Software Stack for Heterogeneous Systems.

[BibT_eX]

[DOI]

IEEE Trans. Multi Scale Comput. Syst., 2018

Slicing FIFOs for on-chip memory bandwidth exhaustion.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017

A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

2016

An MPSoC for energy-efficient database query processing.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

Mattis Hasler

Timeline

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On csauthors.net:

Bibliography

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