Mikiko Sato
Orcid: 0009-0000-2625-2298
According to our database1,
Mikiko Sato
authored at least 48 papers
between 2003 and 2023.
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Bibliography
2023
Proceedings of the Companion Proceedings of the Conference on Genetic and Evolutionary Computation, 2023
Offloading Image Recognition Processing for Care Robots to FPGA on Multi-access Edge Computing.
Proceedings of the International Conference on Field Programmable Technology, 2023
2022
Using Dominated Solutions at Edges to the Diversity and the Uniformity of Non-dominated Solution Distributions in NSGA-II.
SN Comput. Sci., 2022
2021
Proceedings of the 9th International Conference on Model-Driven Engineering and Software Development, 2021
Proceedings of the IEEE Congress on Evolutionary Computation, 2021
2020
Proceedings of the IEEE Congress on Evolutionary Computation, 2020
2019
Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019
Design and Development of Networked Multiple FPGA Components for Autonomous Tiny Robot Car.
Proceedings of the International Conference on Field-Programmable Technology, 2019
Distributed NSGA-II Sharing Extreme Non-dominated Solutions for Improving Accuracy and Achieving Speed-up.
Proceedings of the IEEE Congress on Evolutionary Computation, 2019
2018
Assessment Map for Multidisciplinary Abilities for IoT System Development Education based on a Robot Contest.
Proceedings of the IEEE International Conference on Teaching, 2018
Effects of Duplication Operator in Evolutionary Simultaneous Design Optimization of Multiple Cars.
Proceedings of the 2018 Joint 10th International Conference on Soft Computing and Intelligent Systems (SCIS) and 19th International Symposium on Advanced Intelligent Systems (ISIS), 2018
Multidisciplinary skill assessment for embedded software development education via a robot contest.
Proceedings of the 40th International Conference on Software Engineering: Companion Proceeedings, 2018
Proceedings of the 7th International Conference on Software and Computer Applications, 2018
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2018
2017
Distributed NSGA-II with migration using compensation on many-core processors for improving performance and accuracy.
Proceedings of the Genetic and Evolutionary Computation Conference, 2017
2016
An Operating System Guided Fine-Grained Power Gating Control Based on Runtime Characteristics of Applications.
IEICE Trans. Electron., 2016
2015
A Fine-Grained Power Gating Control on Linux Monitoring Power Consumption of Processor Functional Units.
IEICE Trans. Electron., 2015
2014
Parallelization and sustainability of distributed genetic algorithms on many-core processors.
Int. J. Intell. Comput. Cybern., 2014
Design of Multiple PVAS on InfiniBand Cluster System Consisting of Many-core and Multi-core.
Proceedings of the 21st European MPI Users' Group Meeting, 2014
Multithreaded Two-Phase I/O: Improving Collective MPI-IO Performance on a Lustre File System.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014
pmqFlow: Design of propagation time measuring QoS system with OpenFlow for process automation.
Proceedings of the IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, Dallas, TX, USA, October 29, 2014
First results of performance comparisons on many-core processors in solving QAP with ACO: kepler GPU versus xeon PHI.
Proceedings of the Genetic and Evolutionary Computation Conference, 2014
Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014
2013
Proceedings of the Massively Parallel Evolutionary Computation on GPGPUs, 2013
Improving Parallel I/O Performance Using Multithreaded Two-Phase I/O with Processor Affinity Management.
Proceedings of the Parallel Processing and Applied Mathematics, 2013
A Delegation Mechanism on Many-Core Oriented Hybrid Parallel Computers for Scalability of Communicators and Communications in MPI.
Proceedings of the 21st Euromicro International Conference on Parallel, 2013
Proceedings of the IECON 2013, 2013
Proceedings of the Genetic and Evolutionary Computation Conference, 2013
Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013
Parallelization and fault-tolerance of evolutionary computation on many-core processors.
Proceedings of the IEEE Congress on Evolutionary Computation, 2013
2012
Parallelization of genetic operations that takes building-block linkage into account.
Artif. Life Robotics, 2012
Proceedings of the 2012 IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2012
Delegation-Based MPI Communications for a Hybrid Parallel Computer with Many-Core Architecture.
Proceedings of the Recent Advances in the Message Passing Interface, 2012
A design of hybrid operating system for a parallel computer with multi-core and many-core processors.
Proceedings of the 2nd International Workshop on Runtime and Operating Systems for Supercomputers, 2012
2011
Acceleration experiment of genetic computations for sudoku solution on multi-core processors.
Proceedings of the 13th Annual Genetic and Evolutionary Computation Conference, 2011
Proceedings of the 13th Annual Genetic and Evolutionary Computation Conference, 2011
Proceedings of the IEEE Congress on Evolutionary Computation, 2011
2010
Proposal of a multi-core processor architecture for effective evolutionary computation.
Proceedings of the Genetic and Evolutionary Computation Conference, 2010
Proceedings of the IEEE Congress on Evolutionary Computation, 2010
2009
Proceedings of the ICPP 2009, 2009
2006
A Model of Implementable SMT Processor on FPGA.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications & Conference on Real-Time Computing Systems and Applications, 2006
Towards Reconfigurable Cache Memory for a Multithreaded Processor.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications & Conference on Real-Time Computing Systems and Applications, 2006
2005
Development of a Thread Scheduler for SMT Processor Architecture.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2005
A New Model of Reconfigurable Cache for an SMT Processor and its FPGA Implementation.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2005
2004
Dynamic Allocation of Physical Register Banks for an SMT Processor.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2004
2003
A Process and Thread Management of the Operating System "Future" for On Chip Multithreaded Architecture.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003
Implementation and Evaluation of a Thread Library for Multithreaded Architecture.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003
Performance Evaluation of an On-Chip Multi-Threaded Processor with Cache Memory Managed by Logical Thread Number.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003