Mitsuhiko Igarashi

According to our database, Mitsuhiko Igarashi authored at least 11 papers between 2012 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Ultra Long-term Measurement Results of BTI-induced Aging Degradation on 7-nm Ring Oscillators.

Kazutoshi Kobayashi, Tomoharu Kishita, Hiroki Nakano, Jun Furuta, Mitsuhiko Igarashi, Shigetaka Kumashiro, Michitarou Yabuuchi, Hironori Sakamoto

Proceedings of the IEEE International Reliability Physics Symposium, 2023

2021

An Analysis of Local BTI Variation with Ring-Oscillator in Advanced Processes and Its Impact on Logic Circuit and SRAM.

Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Makoto Yabuuchi, Yasumasa Tsukamoto, Koji Shibutani, Kazutoshi Kobayashi

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021

2019

Study of Local BTI Variation and its Impact on Logic Circuit and SRAM in 7 nm Fin-FET Process.

Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Makoto Yabuuchi, Yasumasa Tsukamoto, Koji Shibutani

Proceedings of the IEEE International Reliability Physics Symposium, 2019

2018

Study of impact of BTI's local layout effect including recovery effect on various standard-cells in 10nm FinFET.

Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Yasumasa Tsukamoto, Koji Shibutani, Koji Nii

Proceedings of the IEEE International Reliability Physics Symposium, 2018

A Fully Standard-Cell Based On-Chip BTI and HCI Monitor with 6.2x BTI sensitivity and 3.6x HCI sensitivity at 7 nm Fin-FET Process.

Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Yasumasa Tsukamoto, Koji Shibutani, Koji Nii

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017

NBTI/PBTI separated BTI monitor with 4.2x sensitivity by standard cell based unbalanced ring oscillator.

Mitsuhiko Igarashi, Yoshio Takazawa, Yasumasa Tsukamoto, Kan Takeuchi, Koji Shibutani

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2015

A 28 nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor With 2 GHz Cores and Low-Power 1 GHz Cores.

Mitsuhiko Igarashi, Toshifumi Uemura, Ryo Mori, Hiroshi Kishibe, Midori Nagayama, Masaaki Taniguchi, Kohei Wakahara, Toshiharu Saito, Masaki Fujigaya, Kazuki Fukuoka, Koji Nii, Takeshi Kataoka, Toshihiro Hattori

IEEE J. Solid State Circuits, 2015

An on-die digital aging monitor against HCI and xBTI in 16 nm Fin-FET bulk CMOS technology.

Mitsuhiko Igarashi, Kan Takeuchi, Takeshi Okagaki, Koji Shibutani, Hiroaki Matsushita, Koji Nii

Proceedings of the ESSCIRC Conference 2015, 2015

2014

10.2 A 28nm HPM heterogeneous multi-core mobile application processor with 2GHz cores and low-power 1GHz cores.

Mitsuhiko Igarashi, Toshifumi Uemura, Ryo Mori, Noriaki Maeda, Hiroshi Kishibe, Midori Nagayama, Masaaki Taniguchi, Kohei Wakahara, Toshiharu Saito, Masaki Fujigaya, Kazuki Fukuoka, Koji Nii, Takeshi Kataoka, Toshihiro Hattori

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Assessment of reliability impact on GHz processors with moderate overdrive.

Mitsuhiko Igarashi, Hideki Aono, Hideaki Abe, Koji Shibutani, Kan Takeuchi

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2012

28-nm HKMG GHz digital sensor for detecting dynamic voltage drops in testing for peak power optimization.

Mitsuhiko Igarashi, Kan Takeuchi, Yoshio Takazawa, Yasuto Igarashi, Hiroaki Matsushita

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012