Peter J. Camporese

According to our database1, Peter J. Camporese authored at least 6 papers between 1997 and 2007.

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Bibliography

2007
IBM POWER6 microprocessor physical design and design methodology.
IBM J. Res. Dev., 2007

2002
IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology.
IBM J. Res. Dev., 2002

2001
A clock distribution network for microprocessors.
IEEE J. Solid State Circuits, 2001

1999
Chip integration methodology for the IBM S/390 G5 and G6 custom microprocessors.
IBM J. Res. Dev., 1999

1997
A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders.
IEEE J. Solid State Circuits, 1997

Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor.
IBM J. Res. Dev., 1997


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