Brian W. Curran

According to our database¹, Brian W. Curran authored at least 26 papers between 1991 and 2022.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

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In proceedings

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PhD thesis

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On csauthors.net:

Bibliography

2022

A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2022

2021

A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

RaPiD: AI Accelerator for Ultra-low Precision Training and Inference.

[BibT_eX]

[DOI]

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020

Efficient AI System Design With Cross-Layer Approximate Computing.

[BibT_eX]

[DOI]

Proc. IEEE, 2020

A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference.

[BibT_eX]

[DOI]

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2018

A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Across the Stack Opportunities for Deep Learning Acceleration.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

2015

Robust power management in the IBM z13.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2015

The IBM z13 multithreaded microprocessor.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2015

4.1 22nm Next-generation IBM System z microprocessor.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2012

IBM zEnterprise 196 microprocessor and cache subsystem.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2012

2011

The zEnterprise 196 System and Microprocessor.

[BibT_eX]

[DOI]

IEEE Micro, 2011

A 5.2GHz microprocessor chip for the IBM zEnterprise™ system.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

IBM zEnterprise 196 processor.

[BibT_eX]

[DOI]

Brian W. Curran

Proceedings of the 2010 IEEE Hot Chips 22 Symposium, Stanford, CA, USA, August 22-24, 2010, 2010

2007

Power-constrained high-frequency circuits for the IBM POWER6 microprocessor.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2007

Design of the Power6 Microprocessor.

[BibT_eX]

[DOI]

Mary Yvonne Lanzerotti

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006

4GHz+ low-latency fixed-point and binary floating-point execution units for the POWER6 processor.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2002

IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2002

2001

Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors.

[BibT_eX]

Proceedings of the SOC Design Methodologies, 2001

1998

Deep submicron design techniques for the 500 MHz IBM S/390 G5 custom microprocessor.

[BibT_eX]

[DOI]

Dale E. Hoffman

Robert M. Averill III

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

1997

A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 1997

Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 1997

Design methodology for the S/390 Parallel Enterprise Server G4 microprocessors.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 1997

High-Performance CMOS Circuit Techniques for the G-4 S/390 Microprocessor.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1996

Switching Codes for Delta-I Noise Reduction.

[BibT_eX]

[DOI]

C. L. Chen

Brian W. Curran

IEEE Trans. Computers, 1996

1991

IBM Enterprise System/9000 Type 9121 system controller and memory subsystem design.

[BibT_eX]

[DOI]

Brian W. Curran

Manfred H. Walz

IBM J. Res. Dev., 1991

Brian W. Curran

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