Peter J. Osler

According to our database1, Peter J. Osler authored at least 4 papers between 1996 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
Design methodology for the IBM POWER7 microprocessor.
IBM J. Res. Dev., 2011

2004
Placement driven synthesis case studies on two sets of two chips: hierarchical and flat.
Proceedings of the 2004 International Symposium on Physical Design, 2004

The great interconnect buffering debate: are you a chicken or an ostrich?
Proceedings of the 2004 International Symposium on Physical Design, 2004

1996
BooleDozer: Logic synthesis for ASICs.
IBM J. Res. Dev., 1996


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