Renzo Andri

According to our database, Renzo Andri authored at least 25 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

MemPool: A Scalable Manycore Architecture With a Low-Latency Shared L1 Memory.

Samuel Riedel, Matheus A. Cavalcante, Renzo Andri, Luca Benini

IEEE Trans. Computers, December, 2023

Stella Nera: Achieving 161 TOp/s/W with Multiplier-free DNN Acceleration based on Approximate Matrix Multiplication.

Jannis Schönleber, Lukas Cavigelli, Renzo Andri, Matteo Perotti, Luca Benini

CoRR, 2023

Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV1.0 Compliant Open-Source Processor.

Matteo Perotti, Matheus A. Cavalcante, Renzo Andri, Lukas Cavigelli, Luca Benini

CoRR, 2023

MemPool Meets Systolic: Flexible Systolic Computation in a Large Shared-Memory Processor Cluster.

Samuel Riedel, Gua Hao Khov, Sergio Mazzola, Matheus A. Cavalcante, Renzo Andri, Luca Benini

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Flex-SFU: Accelerating DNN Activation Functions by Non-Uniform Piecewise Approximation.

Enrico Reggiani, Renzo Andri, Lukas Cavigelli

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks.

Gianmarco Cerutti, Lukas Cavigelli, Renzo Andri, Michele Magno, Elisabetta Farella, Luca Benini

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Empowering Data Centers for Next Generation Trusted Computing.

Aritra Dhar, Supraja Sridhara, Shweta Shinde, Srdjan Capkun, Renzo Andri

CoRR, 2022

Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tile.

Renzo Andri, Beatrice Bussolino, Antonio Cipolletta, Lukas Cavigelli, Zhe Wang

CoRR, 2022

Identifying and Exploiting Sparse Branch Correlations for Optimizing Branch Prediction.

Anastasios Zouzias, Kleovoulos Kalaitzidis, Konstantin Berestizshevsky, Renzo Andri, Leeor Peled, Zhe Wang

CoRR, 2022

Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tiles.

Renzo Andri, Beatrice Bussolino, Antonio Cipolletta, Lukas Cavigelli, Zhe Wang

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design.

Matteo Perotti, Matheus A. Cavalcante, Nils Wistoff, Renzo Andri, Lukas Cavigelli, Luca Benini

Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022

2021

RNN-Based Radio Resource Management on Multicore RISC-V Accelerator Architectures.

Gianna Paulin, Renzo Andri, Francesco Conti, Luca Benini

IEEE Trans. Very Large Scale Integr. Syst., 2021

ChewBaccaNN: A Flexible 223 TOPS/W BNN Accelerator.

Renzo Andri, Geethan Karunaratne, Lukas Cavigelli, Luca Benini

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Machine learning acceleration for tightly energy-constrained devices.

Renzo Andri

PhD thesis, 2020

Sound event detection with binary neural networks on tightly power-constrained IoT devices.

Gianmarco Cerutti, Renzo Andri, Lukas Cavigelli, Elisabetta Farella, Michele Magno, Luca Benini

Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

Extending the RISC-V ISA for Efficient RNN-based 5G Radio Resource Management.

Renzo Andri, Tomas Henriksson, Luca Benini

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Hyperdrive: A Multi-Chip Systolically Scalable Binary-Weight CNN Inference Engine.

Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini

IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

2018

YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration.

Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-Nodes.

Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

XNORBIN: A 95 TOp/s/W hardware accelerator for binary convolutional neural networks.

Andrawes Al Bahou, Geethan Karunaratne, Renzo Andri, Lukas Cavigelli, Luca Benini

Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018

2017

Accelerated Visual Context Classification on a Low-Power Smartwatch.

Francesco Conti, Daniele Palossi, Renzo Andri, Michele Magno, Luca Benini

IEEE Trans. Hum. Mach. Syst., 2017

2016

InfiniTime: Multi-sensor wearable bracelet with human body harvesting.

Michele Magno, Davide Brunelli, Lukas Sigrist, Renzo Andri, Lukas Cavigelli, Andres Gomez, Luca Benini

Sustain. Comput. Informatics Syst., 2016

YodaNN: An Ultra-Low Power Convolutional Neural Network Accelerator Based on Binary Weights.

Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015

Ultra-Low Power Context Recognition Fusing Sensor Data from an Energy-Neutral Smart Watch.

Michele Magno, Lukas Cavigelli, Renzo Andri, Luca Benini

Proceedings of the Internet of Things. IoT Infrastructures, 2015

2014

SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC.

Michael Gautschi, Michael Muehlberghuber, Andreas Traber, Sven Stucki, Matthias Baer, Renzo Andri, Luca Benini, Beat Muheim, Hubert Kaeslin

Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014