Lukas Cavigelli
Orcid: 0000-0003-1767-7715
According to our database1,
Lukas Cavigelli
authored at least 64 papers
between 2013 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
On csauthors.net:
Bibliography
2024
On-Device Domain Learning for Keyword Spotting on Low-Power Extreme Edge Embedded Systems.
CoRR, 2024
CoRR, 2024
2023
Stella Nera: Achieving 161 TOp/s/W with Multiplier-free DNN Acceleration based on Approximate Matrix Multiplication.
CoRR, 2023
Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV1.0 Compliant Open-Source Processor.
CoRR, 2023
ReDSEa: Automated Acceleration of Triangular Solver on Supercloud Heterogeneous Systems.
CoRR, 2023
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Flex-SFU: Accelerating DNN Activation Functions by Non-Uniform Piecewise Approximation.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
Vau Da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
CUTIE: Beyond PetaOp/s/W Ternary DNN Inference Acceleration With Better-Than-Binary Energy Efficiency.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tile.
CoRR, 2022
Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tiles.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design.
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
Sub-100 $\mu$W Multispectral Riemannian Classification for EEG-Based Brain-Machine Interfaces.
IEEE Trans. Biomed. Circuits Syst., 2021
CoRR, 2021
Mixed-Precision Quantization and Parallel Implementation of Multispectral Riemannian Classification for Brain-Machine Interfaces.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Late Breaking Results: Reinforcement Learning for Scalable Logic Optimization with Graph Neural Networks.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
ECG-TCN: Wearable Cardiac Arrhythmia Detection with a Temporal Convolutional Network.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
CBinfer: Exploiting Frame-to-Frame Locality for Faster Convolutional Network Inference on Video Streams.
IEEE Trans. Circuits Syst. Video Technol., 2020
FANN-on-MCU: An Open-Source Toolkit for Energy-Efficient Neural Network Inference at the Edge of the Internet of Things.
IEEE Internet Things J., 2020
RPR: Random Partition Relaxation for Training; Binary and Ternary Weight Neural Networks.
CoRR, 2020
EEG-TCNet: An Accurate Temporal Convolutional Network for Embedded Motor-Imagery Brain-Machine Interfaces.
Proceedings of the 2020 IEEE International Conference on Systems, Man, and Cybernetics, 2020
Q-EEGNet: an Energy-Efficient 8-bit Quantized Parallel EEGNet Implementation for Edge Motor-Imagery Brain-Machine Interfaces.
Proceedings of the IEEE International Conference on Smart Computing, 2020
Sound event detection with binary neural networks on tightly power-constrained IoT devices.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
InfiniWolf: Energy Efficient Smart Bracelet for Edge Computing with Dual Source Energy Harvesting.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
SmarTEG: An Autonomous Wireless Sensor Node for High Accuracy Accelerometer-Based Monitoring.
Sensors, 2019
EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
HR-SAR-Net: A Deep Neural Network for Urban Scene Segmentation from High-Resolution SAR Data.
CoRR, 2019
CoRR, 2019
FANNCortexM: An Open Source Toolkit for Deployment of Multi-layer Neural Networks on ARM Cortex-M Family Microcontrollers : Performance Analysis with Stress Detection.
Proceedings of the 5th IEEE World Forum on Internet of Things, 2019
Laelaps: An Energy-Efficient Seizure Detection Algorithm from Long-term Human iEEG Recordings without False Alarms.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019
2018
IEEE Trans. Image Process., 2018
IEEE Trans. Instrum. Meas., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-Nodes.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Rat Cortical Layers Classification extracting Evoked Local Field Potential Images with Implanted Multi-Electrode Sensor.
Proceedings of the 20th IEEE International Conference on e-Health Networking, 2018
Fast and Accurate Multiclass Inference for MI-BCIs Using Large Multiscale Temporal and Spectral Features.
Proceedings of the 26th European Signal Processing Conference, 2018
Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018
Chipmunk: A systolically scalable 0.9 mm<sup>2</sup>, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
Embedded Classification of Local Field Potentials Recorded from Rat Barrel Cortex with Implanted Multi-Electrode Array.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
2017
IEEE Trans. Circuits Syst. Video Technol., 2017
Chipmunk: A Systolically Scalable 0.9 mm<sup>2</sup>, 3.08 Gop/s/mW @ 1.2 mW Accelerator for Near-Sensor Recurrent Neural Network Inference.
CoRR, 2017
Soft-to-Hard Vector Quantization for End-to-End Learned Compression of Images and Neural Networks.
CoRR, 2017
Soft-to-Hard Vector Quantization for End-to-End Learning Compressible Representations.
Proceedings of the Advances in Neural Information Processing Systems 30: Annual Conference on Neural Information Processing Systems 2017, 2017
CAS-CNN: A deep convolutional neural network for image compression artifact suppression.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017
Proceedings of the 11th International Conference on Distributed Smart Cameras, 2017
Proceedings of the 25th European Signal Processing Conference, 2017
Impact of temporal subsampling on accuracy and performance in practical video classification.
Proceedings of the 25th European Signal Processing Conference, 2017
2016
Sustain. Comput. Informatics Syst., 2016
Computationally Efficient Target Classification in Multispectral Image Data with Deep Neural Networks.
CoRR, 2016
YodaNN: An Ultra-Low Power Convolutional Neural Network Accelerator Based on Binary Weights.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
2015
Ultra-Low Power Context Recognition Fusing Sensor Data from an Energy-Neutral Smart Watch.
Proceedings of the Internet of Things. IoT Infrastructures, 2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
2013
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
A Complete Real-Time Feature Extraction and Matching System Based on Semantic Kernels Binarized.
Proceedings of the VLSI-SoC: At the Crossroads of Emerging Trends, 2013