Fernando García-Redondo

According to our database, Fernando García-Redondo authored at least 21 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

AR-PIM: An Adaptive-Range Processing-in-Memory Architecture.

Teyuh Chou, Fernando García-Redondo, Paul N. Whatmough, Zhengya Zhang

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

MNEMOSENE++: Scalable Multi-Tile Design with Enhanced Buffering and VGSOT-MRAM based Compute-in-Memory Crossbar Array.

Carlos Escuin, Fernando García-Redondo, Mahdi Zahedi, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, José María Llabería, James Myers, Julien Ryckaert, Dwaipayan Biswas, Francky Catthoor

Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes.

Fernando García-Redondo, S. Rao, M. Gupta, Manu Perumkunnil, Y. Xiang, D. Abdi, Simon Van Beek, S. Couet, Marie Garcia Bardon

Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

2022

ML-HW Co-Design of Noise-Robust TinyML Models and Always-On Analog Compute-in-Memory Edge Accelerator.

Chuteng Zhou, Fernando García-Redondo, Julian Büchel, Irem Boybat, Xavier Timoneda Comas, S. R. Nandakumar, Shidhartha Das, Abu Sebastian, Manuel Le Gallo, Paul N. Whatmough

IEEE Micro, 2022

SACA: System-level Analog CIM Accelerators Simulation Framework: Architecture and Cycle-accurate System-to-device Simulator.

Kanishkan Vadivel, Fernando García-Redondo, Ali BanaGozar, Henk Corporaal, Shidhartha Das

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

SACA: System-level Analog CIM Accelerators Simulation Framework: Accurate Simulation of Non-Ideal Components.

Fernando García-Redondo, Ali BanaGozar, Kanishkan Vadivel, Henk Corporaal, Shidhartha Das

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021

AnalogNets: ML-HW Co-Design of Noise-robust TinyML Models and Always-On Analog Compute-in-Memory Accelerator.

Chuteng Zhou, Fernando García-Redondo, Julian Büchel, Irem Boybat, Xavier Timoneda Comas, S. R. Nandakumar, Shidhartha Das, Abu Sebastian, Manuel Le Gallo, Paul N. Whatmough

CoRR, 2021

A Compact Model for Scalable MTJ Simulation.

Fernando García-Redondo, Pranay Prabhat, Mudit Bhargava, Cyrille Dray

CoRR, 2021

A Fokker-Planck Solver to Model MTJ Stochasticity.

Fernando García-Redondo, Pranay Prabhat, Mudit Bhargava

Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

-17 dBm Differential charge pump EPC Gen2 UHF RFID demodulator for 9 dB receive sensitivity boost.

Anand Savanth, Philex Ming-Yan Fan, Sahan Gamage, Thanushree Achuthan, Fernando García-Redondo

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020

27.2 M0N0: A Performance-Regulated 0.8-to-38MHz DVFS ARM Cortex-M33 SIMD MCU with 10nW Sleep Power.

Pranay Prabhat, Benoît Labbé, Graham Knight, Anand Savanth, Jonas Svedas, Matthew J. Walker, Supreet Jeloka, Philex Ming-Yan Fan, Fernando García-Redondo, Thanusree Achuthan, James Myers

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

Training DNN IoT Applications for Deployment On Analog NVM Crossbars.

Fernando García-Redondo, Shidhartha Das, Glen Rosendale

Proceedings of the 2020 International Joint Conference on Neural Networks, 2020

2019

Applications of Computation-In-Memory Architectures based on Memristive Devices.

Said Hamdioui, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Abu Sebastian, Manuel Le Gallo, Sandeep Pande, Siebren Schaafsma, Francky Catthoor, Shidhartha Das, Fernando García-Redondo, Geethan Karunaratne, Abbas Rahimi, Luca Benini

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

A Time-Domain Current-Mode MAC Engine for Analogue Neural Networks in Flexible Electronics.

Matthew Douthwaite, Fernando García-Redondo, Pantelis Georgiou, Shidhartha Das

Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

2018

Auto-Erasable RRAM Architecture Secured Against Physical and Firmware Attacks.

Fernando García-Redondo, Marisa López-Vallejo

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2017

Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges.

Fernando García-Redondo, Pablo Royer, Marisa López-Vallejo, Hernan Aparicio, Pablo Ituero, Carlos A. López-Barrio

IEEE Trans. Very Large Scale Integr. Syst., 2017

Advanced integration of variability and degradation in RRAM SPICE compact models.

Fernando García-Redondo, Marisa López-Vallejo, Carlos A. López-Barrio

Proceedings of the 14th International Conference on Synthesis, 2017

2016

SPICE Compact Modeling of Bipolar/Unipolar Memristor Switching Governed by Electrical Thresholds.

Fernando García-Redondo, Robert P. Gowers, Albert Crespo-Yepes, Marisa López-Vallejo, Liudi Jiang

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Reliable design methodology: The combined effect of radiation, variability and temperature.

Fernando García-Redondo, Marisa López-Vallejo, Hernan Aparicio, Pablo Ituero

Proceedings of the 13th International Conference on Synthesis, 2016

2015

Evolution of radiation-induced soft errors in FinFET SRAMs under process variations beyond 22nm.

Pablo Royer, Fernando García-Redondo, Marisa López-Vallejo

Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

A thermal adaptive scheme for reliable write operation on RRAM based architectures.

Fernando García-Redondo, Marisa López-Vallejo, Pablo Ituero

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015